Abstract
Reconfigurable hardware components such as Field Programmable Gate Arrays (FPGAs) are used more and more in embedded systems, since such components offer a sufficient capacity for a complete System on a Chip (SoC) with a high degree of flexibility. In order to use efficiently the dynamic reconfiguration possibility on such components, there is a need to exploit this feature on complex real-world applications. This paper proposes a dynamically reconfigurable architecture for JPEG2000 application. The dynamic reconfiguration of JPEG2000 enables us to use hardware resources more efficiently which reduces power consumption and increases the frame rate of image compression.
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Ahmadinia, A., Fernandez-Canque, H., Ramirez-Iniguez, R. (2011). Dynamic Reconfiguration in JPEG2000 Hardware Architecture. In: König, A., Dengel, A., Hinkelmann, K., Kise, K., Howlett, R.J., Jain, L.C. (eds) Knowledge-Based and Intelligent Information and Engineering Systems. KES 2011. Lecture Notes in Computer Science(), vol 6883. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-23854-3_48
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DOI: https://doi.org/10.1007/978-3-642-23854-3_48
Publisher Name: Springer, Berlin, Heidelberg
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