Abstract
In this paper, a CA-2D-VLC decoder in SOC design for AVS is presented. Logical and feasible division between software and hardware is proposed on the basis of sufficient validity check. Under control of an embedded CPU, this design can decode Fixed Length Code, unsigned or signed k-th Exp-Golomb Code and context-based adaptive 2D-VLC (CA-2D-VLC) Code. As a result of reasonable design and optimization for 2D-VLC table, a reduction of more than 30% in hardware cycle number consumption is achieved. C reference model for whole decoder was proposed as well, which is adopted to verify the decoding algorithm and register cycle number consumed by hardware. Though designed for AVS video standard originally, the architecture can be adapted to other coding standards easily.
This work is supported by the construct program of the Key Laboratory of Intelligent System in ZUCC.
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Liu, W., Wang, X., Chen, Y. (2011). CA-2D-VLC Decoder for AVS in SOC Design. In: Zhang, J. (eds) Applied Informatics and Communication. ICAIC 2011. Communications in Computer and Information Science, vol 227. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-23226-8_29
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DOI: https://doi.org/10.1007/978-3-642-23226-8_29
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