FPGA Framework for Agent Systems Using Dynamic Partial Reconfiguration

  • Edward Chen
  • Victor Gusev Lesau
  • Dorian Sabaz
  • Lesley Shannon
  • William A. Gruver
Part of the Lecture Notes in Computer Science book series (LNCS, volume 6867)


Dynamic Partial Reconfiguration of FPGAs enables tasks typically executed in software, such as threads and agents, to be executed directly in hardware. Typically, these systems use a CPU to manage the hardware and software tasks, but they do not take full advantage of the concurrency capable from an FPGA. This paper presents a hardware framework that leverages the concept of agents for FPGA-based designs. This enables not only the hardware modules to be viewed as agents, but also provides a means to selectively design and componentize the communications network for the hardware agents. The proposed framework enables hardware agents to be implemented to run concurrently and allows them to communicate with each other without requiring a CPU.


Dynamic Partial Reconfiguration FPGA Hardware Abstraction Agent Systems 


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Copyright information

© Springer-Verlag Berlin Heidelberg 2011

Authors and Affiliations

  • Edward Chen
    • 1
  • Victor Gusev Lesau
    • 1
  • Dorian Sabaz
    • 2
  • Lesley Shannon
    • 1
  • William A. Gruver
    • 1
    • 2
  1. 1.School of Engineering ScienceSimon Fraser UniversityBurnabyCanada
  2. 2.Intelligent Robotics CorporationNorth VancouverCanada

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