Abstract
This paper presents a new VLSI architecture for fractional motion estimation (FME) in H.264/AVC. Statistical characteristics of the motion vectors of different inter-prediction modes are analyzed. The FME architecture explored block-level parallelism and can process multiple blocks with the same prediction mode simultaneously, external memory data accesses are dramatically reduced. Simulation results show that the proposed architecture can support 1080P (1960x1088) at 30fps with a frequency of 80MHz.
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Zhao, Z., Liang, P. (2011). An Efficient Parallel Architecture for H.264/AVC Fractional Motion Estimation. In: Tsihrintzis, G.A., Virvou, M., Jain, L.C., Howlett, R.J. (eds) Intelligent Interactive Multimedia Systems and Services. Smart Innovation, Systems and Technologies, vol 11. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-22158-3_14
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DOI: https://doi.org/10.1007/978-3-642-22158-3_14
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-22157-6
Online ISBN: 978-3-642-22158-3
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