Abstract
NoC (Network-on-Chip) is inherently suitable to the dynamic partial reconfiguration. DRNoC, combining these two promising technologies, will be a desirable platform for the next generation portable eletronic consuming products. Taking the irregular 2D mesh NoC as a study case, this paper discusses the design methodology of DRNoC, including the topology, router, mapping algorithm, routing algorithm, implementation and simulation of DRNoC.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Devaux, L., Sassi, S.B., et al.: Flexible Interconnection Network for Dynamically and Partially Reconfigurable Architectures. International Journal of Reconfigurable Computing (2010)
Bobda, C., Ahmadinia, A., Majer, M., Teich, J., Fekete, S., Veen, J.v.d.: DyNoC: a dynamic infrastructure for communicationin dynamically reconfigurable devices. In: Proceedingsof the International Conference on Field Programmable Logicand Applications (FPL 2005), Tampere,Finland, pp. 153–158 (August 2005)
Pionteck, T., Koch, R., Albrecht, C.: Applying partial reconfiguration to networks-onchips. In: Proceedings of the International Conference on Field Programmable Logic and Applications (FPL 06), pp. 155–160, Madrid, Spain (August 2006)
Jovanovic, S., Tanougast, C., et al.: CuNoC: A dynamic scalable communication structure for dynamically reconfigurable FPGAs. Microprocessors and Microsystems 33, 24–36 (2009)
Gu, H., Li, C., Sunshu: Research on Mapping Algorithm of irregular mesh NoC for Portable Multimedia Appliances. In: CCWMSN 2007 (2007)
Xilinx: Difference-Based Partial Reconfiguration, Application Note XAPP290 (2007)
Varatkar, G., Marculescu, R.: Traffic analysis for on-chip networks design of multimedia applications. In: Proc. of DAC, New Orleans, Louisiana (June 2002)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2011 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Gu, H. (2011). Design Methodology of Dynamically Reconfigurable Network-on-Chip. In: Ma, M. (eds) Communication Systems and Information Technology. Lecture Notes in Electrical Engineering, vol 100. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-21762-3_14
Download citation
DOI: https://doi.org/10.1007/978-3-642-21762-3_14
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-21761-6
Online ISBN: 978-3-642-21762-3
eBook Packages: EngineeringEngineering (R0)