Abstract
Different architectures and/or ISA (Instruction Set Architecture) representations hold different data arranging formats in the memory. Therefore, the adjustment of byte packing order (endianness) is indispensable in cross- architecture binary translation if the source and target machines are of heterogeneous endianness, which may otherwise cause system failure. The issue is inconspicuous but may lead to significant performance bottleneck. This paper investigates the key aspects of endianness and finds several solutions to endian adjustment for cross-architecture binary translation. In particular, it considers the two principal methods of this field — byte swapping and address swizzling, and gives a comparison of them in our DBT (Dynamic Binary Translator) — CrossBit.
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© 2011 Springer-Verlag Berlin Heidelberg
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Zhu, T., Liu, B., Guan, H., Liang, A. (2011). Flexible Endian Adjustment for Cross Architecture Binary Translation. In: Shen, G., Huang, X. (eds) Advanced Research on Electronic Commerce, Web Application, and Communication. ECWAC 2011. Communications in Computer and Information Science, vol 143. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-20367-1_25
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DOI: https://doi.org/10.1007/978-3-642-20367-1_25
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-20366-4
Online ISBN: 978-3-642-20367-1
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