Abstract
Using Cypress company’s VIC068A chip, the link interface circuit of VME bus and DSP are designed. The result indicates that this circuit may better achieve communication from DSP to CPU of Motorola 68K series and solve the problem of incompatibility between DSP and CPU of Motorola 68K series.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Brydon, G.: Decoupling Opens Bottlenecks In VME64-based DSP systems. Electronic Design, vol. (3), pp. 147–149 (1997)
Wang, H., Gao, M., Han, Y.: The design and implementation of SHARC parallel processing system based on VME bus. Beijing University of Technology 20(4), 480–484 (2000)
Xiang, B.: Use FPGA to implement VME bus interface. Acoustics and Electronic Engineering (3), 40–44 (2000)
Chiechi, B.: MFLOPS Dictates Diligent Board Design. Electronic Design (3), 52–55 (1996)
Grehan, R.: DSPs get parallel. Computer Design (9), 83–98 (1997)
Ludemann, J., Ressing, D., Wurth, R.: A SHARC DSP Cluster as HERA-B DAQ Building Block. IEEE Transaction On Nuclear Science 44(3), 403–406 (1997)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2011 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Ji-sheng, L., Rong, L. (2011). Research on Achieving of VME Bus by VIC068A. In: Qi, L. (eds) Information and Automation. ISIA 2010. Communications in Computer and Information Science, vol 86. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-19853-3_106
Download citation
DOI: https://doi.org/10.1007/978-3-642-19853-3_106
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-19852-6
Online ISBN: 978-3-642-19853-3
eBook Packages: Computer ScienceComputer Science (R0)