Low Power Lapped Bi-orthogonal Transform (LBT) for FPGA’s
The power reduction is the crucial part in hardware architecture especially in the case of battery driven applications. In this paper, a low power and low area Lapped Biorthogonal Transform (LBT) for Field Programmable Gate Arrays (FPGAs) has been proposed based on flow graph algorithm (FGA) which significantly reduces the power and area. The proposed LBT is implemented in Cylcone III Nios II embedded evaluation kit using Quartus II tool. The simulation and synthesis result reveals that the proposed LBT significantly exhibits an improved performance. Hence it is suitable for low power, low area and high speed applications.
KeywordsLow power Lapped Biorthogonal Transform Discrete Cosine Transform Area
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