Low Power Lapped Bi-orthogonal Transform (LBT) for FPGA’s

  • P. Deepa
  • C. Vasanthanayaki
Conference paper
Part of the Communications in Computer and Information Science book series (CCIS, volume 142)


The power reduction is the crucial part in hardware architecture especially in the case of battery driven applications. In this paper, a low power and low area Lapped Biorthogonal Transform (LBT) for Field Programmable Gate Arrays (FPGAs) has been proposed based on flow graph algorithm (FGA) which significantly reduces the power and area. The proposed LBT is implemented in Cylcone III Nios II embedded evaluation kit using Quartus II tool. The simulation and synthesis result reveals that the proposed LBT significantly exhibits an improved performance. Hence it is suitable for low power, low area and high speed applications.


Low power Lapped Biorthogonal Transform Discrete Cosine Transform Area 


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Copyright information

© Springer-Verlag Berlin Heidelberg 2011

Authors and Affiliations

  • P. Deepa
    • 1
  • C. Vasanthanayaki
    • 1
  1. 1.Department of Electronics and Communication EngineeringGovernment College of TechnologyCoimbatoreIndia

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