Abstract
In this paper we report the development of an assembly method for chip/wafer bumping in flip chip packaging and for MEMS integration. In this approach, microstructures and MEMS devices are fabricated on a low cost carrier. They are then transferred onto the target chip/board. The new assembly method offers several advantages over monolithic integration of microstructures and MEMS devices. As the structures and devices are not fabricated on a target chip/wafer/board, back end processing of the latter is greatly reduced, thus the method is particularly advantageous where direct fabrication on the latter is impossible due to process incompatibility. Secondly the method allows cost effective batch fabrication of MEMS microstructures and devices. The method also offers flexibility in that the microstructures and devices can be transferred selectively. The method has been used to realise off-chip MEMS inductor devices by creating an air gap between the device and the substrate. These devices have potential applications in RF IC circuits for next generation of wireless communications. It has been shown that off-chip inductor devices offer high-Q, high frequency performance over the conventional on-chip devices by reducing the parasitic coupling to the silicon substrate [1].
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
J.B.Yoon et al, “CMOS-compatible surface-micromachined suspended-spiral inductors for multi-GHz silicon RF ICs”, IEEE Electron Device Letters, 23, 591–593, (2002).
Oppert et al, “Low cost flip chip bumping”, Proceedings of the International Symposium on Electronic Materials and Packaging (EMAP2000), Hong Kong, 30 Nov. - 2 Dec. 2000.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2004 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Wang, C.H., Pang, A.J., Zhang, J., Sangster, A.J. (2004). Laboratory for Machine Tools and Production Technology: A Novel Assembly Method for Chip/Wafer Bumping and Mems Integration. In: Knobloch, H., Kaminorz, Y. (eds) MicroNano Integration. VDI-Buch. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-18727-8_37
Download citation
DOI: https://doi.org/10.1007/978-3-642-18727-8_37
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-62265-6
Online ISBN: 978-3-642-18727-8
eBook Packages: Springer Book Archive