A Low-Voltage Log-Domain Integrator Using MOSFET in Weak Inversion
In this paper a low-voltage integrator circuit using MOSFETs in sub-threshold region is presented. This integrator is a Current-mode log-domain circuit. The EKV MOSFET model is used for sub-threshold region simulations. Model parameters of IBM CMOS 130nm technology are used. This integrator works with a 500mv single supply voltage and its input current range is as high as bias current of the input transistor. According to CADENCE simulation results for 1pf integrating capacitor and bias current of 20nA, cutoff frequency is 113.4 KHz and power consumption is 45.44nW. Integrator’s Cutoff frequency is tuned from 1.083 KHz to 1.023MHz using variable integrator capacitor value in the range of 10pf-0.1pf.
KeywordsNonlinear electronics Sub-threshold CMOS Log-domain Integrator Companding method low voltage low power
Unable to display preview. Download preview PDF.
- 1.Serra-Graells, F., Rueda, A., Huertas, J.L.: Low- Voltage CMOS Log Companding Analog Design. Kluwer Academic Publishers, Dordrecht (2003)Google Scholar
- 2.Sanchez Sinencio, E., Andrreou, A.G.: Low Voltage/Low Power Integrated Circuits and Systems, Low Voltage Mixed Signal Circuits. IEEE press series in microelectronic systems, ch.3, pp. 68–72 (1998)Google Scholar
- 3.Gray, P.R., Meyer, R.G.: Analysis and Design of Analog Integrated Circuits, 5th edn. John Wiley & Sons Ltd., Chichester (2000)Google Scholar