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Residue Arithmetic for Designing Low-Power Multiply-Add Units

  • Ioannis Kouretas
  • Vassilis Paliouras
Part of the Lecture Notes in Computer Science book series (LNCS, volume 6448)

Abstract

In this paper an efficient way to exploit multi-Vdd standard-cell libraries is quantitatively investigated as a means to reduce power consumption of multiply-add units. It is shown that multi-Vdd library-based design is suitable for RNS systems due to their inherent modular organization. In particular the paths defined by the isolated moduli channels are clearly distinguished and the designer can easily and efficiently determine high- and low-voltage areas in the design. Three-, four- and five-moduli RNS bases have been used for the design of the RNS multiply-add units. Comparisons to synthesized circuits that do not use multi-Vdd libraries revealed power reduction up to 38%.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2011

Authors and Affiliations

  • Ioannis Kouretas
    • 1
  • Vassilis Paliouras
    • 1
  1. 1.Electrical and Computer Engineering Dept.University of PatrasGreece

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