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White-Box Current Source Modeling Including Parameter Variation and Its Application in Timing Simulation

  • Christoph Knoth
  • Irina Eichwald
  • Petra Nordholz
  • Ulf Schlichtmann
Part of the Lecture Notes in Computer Science book series (LNCS, volume 6448)

Abstract

This paper presents a novel method for generating current source models (CSMs) for logic cells that efficiently captures the influences of parameter variation and supply voltage drops. The characterization exploits topological information from the transistor netlist resulting in typically 80x faster CSM library generation. The parametric CSMs have been integrated into a commercial FastSPICE simulator to further accelerate path-based timing analysis with transistor level accuracy.Without loss of accuracy, simulation times were reduced by 4x to 98x.

Keywords

Monte Carlo Transient Simulation Logic Cell Design Automation Conference Transistor Model 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2011

Authors and Affiliations

  • Christoph Knoth
    • 1
  • Irina Eichwald
    • 1
  • Petra Nordholz
    • 2
  • Ulf Schlichtmann
    • 1
  1. 1.Institute for Electronic Design AutomationTechnische Universität MünchenGermany
  2. 2.Infineon Technologies AGMunichGermany

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