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Practical and Theoretical Considerations on Low-Power Probability-Codes for Networks-on-Chip

  • Alberto Garcia-Ortiz
  • Leandro S. Indrusiak
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 6448)

Abstract

Low-power coding represents an important technique to reduce consumption in modern interconnect architectures. In the case of Network-on-Chip, and specially if they include virtual channels, the coding techniques require to be effective (large reduction of transition activity) and extremely efficient (reduced hardware resources). This work proposes a coding template called PM with those characteristics. Moreover, it shows with a detailed theoretical analysis and a number of experiments the good characteristics of the approach. Some relevant theoretical results on Exact Probability Coding are also developed in the paper.

Keywords

Processing Element Network Interface Virtual Channel Dynamic Power Consumption Probability Coder 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2011

Authors and Affiliations

  • Alberto Garcia-Ortiz
    • 1
  • Leandro S. Indrusiak
    • 2
  1. 1.Institute for Theoretical Electrical Eng. and Microelectronics (ITEM)University of BremenBremenGermany
  2. 2.Dept. of Computer Science - Real-Time Systems Group (RTS)University of YorkYorkUK

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