Feature Extraction Using Reconfigurable Hardware

  • Wiesław Pamula
Part of the Lecture Notes in Computer Science book series (LNCS, volume 6375)


Feature extraction is an important stage in image processing for object classification, tracking or identification. Real time processing adds stringent constraints on the efficiency of this task. The paper presents a discussion of a reconfigurable hardware processing architecture, based on components, for performing feature calculations using convolutions, morphology operators and local statistics. Special attention is directed to pipelining calculations, fast determination of minimum, median and maximum of values. The architecture is optimised for video streams, which provide the image contents using horizontal scanning. An implementation using a low cost FPGA is presented proving the feasibility of this approach.


IEEE Computer Society Video Stream Interest Point Vehicle Detector FPGA Device 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer-Verlag Berlin Heidelberg 2010

Authors and Affiliations

  • Wiesław Pamula
    • 1
  1. 1.Silesian University of TechnologyKatowicePoland

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