Germanium Processing

  • H. GambleEmail author
  • B. M. Armstrong
  • P. T. Baine
  • Y. H. Low
  • P. V. Rainey
  • S. J. N. Mitchell
  • D. W. McNeill
Part of the Engineering Materials book series (ENG.MAT.)


This paper reviews the development of germanium technology for applications in high performance CMOS ICs, rf and MMICs. The paper covers the development of MOSFET technology with respect to source/drain doping and gate dielectrics. Germanium has higher junction leakage currents than silicon on account of its lower energy bandgap. It is a scarce material, expensive and the wafer size is limited. To minimize these disadvantages germanium will be employed as a thin layer on an insulator substrate. Various methods of producing germanium-on-insulator (GeOI) substrates are outlined. These include the Smart-cut process, the condensation process starting with SOI wafers and the epitaxial growth of germanium on lattice matched crystalline oxides grown on silicon substrates. Partial GeOI layer techniques reviewed are dislocation necking of solid phase epitaxial layers grown in narrow high aspect ratio trenches and liquid phase epitaxy from rapid melt germanium confined in micro-crucibles. The fabrication of germanium on dielectric substrates such as quartz, sapphire and alumina are also discussed.


SiGe Layer Solid Phase Epitaxy Single Crystal Germanium Germanium Layer Germanium Surface 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer-Verlag Berlin Heidelberg 2011

Authors and Affiliations

  • H. Gamble
    • 1
    Email author
  • B. M. Armstrong
    • 1
  • P. T. Baine
    • 1
  • Y. H. Low
    • 1
  • P. V. Rainey
    • 1
  • S. J. N. Mitchell
    • 1
  • D. W. McNeill
    • 1
  1. 1.School of Electronics, Electrical Engineering and Computer ScienceThe Queen’s University of BelfastBelfastIreland

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