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Implementation of the PCB Pattern Matching System to Detect Defects

  • Conference paper
Life System Modeling and Intelligent Computing (ICSEE 2010, LSMS 2010)

Abstract

FPGA-based PCB Pattern Matching System, which supports a Camera Link (Medium), was used to detect PCB defect patterns. For the automation of the vision inspection of the PCB production process, the system was optimized by implementing the vision library in IP, which is used to produce high speed processing FPGA-based systems and to detect defect patterns. The implemented IPs comprised of Pattern Matching IP, VGA Control IP, Memory Control IP and Single Clock Processing MAD Pattern Matching IP. Xilinx was used to process the image transmitted in high speed from Digital Camera, Vertex-4 type FPGA chip. It allowed the processing of 2352(H) * 1728(V) *8Bit image data transmitted from the camera without the need for a separate Frame Grabber Board[5] in the FPGA. In addition, it could check the image data on a PC. For pattern matching, it abstracted a 480*480 area out of the image, transmitted the image to each IP and displayed the Pattern Matching output result on a TFT-LCD.

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References

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© 2010 Springer-Verlag Berlin Heidelberg

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Moon, CH., Jang, HC., Jun, JK. (2010). Implementation of the PCB Pattern Matching System to Detect Defects. In: Li, K., Li, X., Ma, S., Irwin, G.W. (eds) Life System Modeling and Intelligent Computing. ICSEE LSMS 2010 2010. Communications in Computer and Information Science, vol 97. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-15853-7_5

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  • DOI: https://doi.org/10.1007/978-3-642-15853-7_5

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-15852-0

  • Online ISBN: 978-3-642-15853-7

  • eBook Packages: Computer ScienceComputer Science (R0)

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