Abstract
The performance analysis of an efficient multiprocessor architecture that allows accelerating the emulation of large-scale Spiking Neural Networks (SNNs) is reported. After describing the architecture and the complex SNN algorithm mapping, the performance study demonstrates that the system can emulate up to 10,000 300-synapse neurons in real time at 64 MHz with conventional FPGAs. Important improvements can be achieved by using advanced technology and increased clock rate or by means of simple architecture modifications. The architecture is flexible enough to be efficiently applied to any SNN model in general.
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Sánchez, G., Madrenas, J., Moreno, J.M. (2010). Performance Evaluation and Scaling of a Multiprocessor Architecture Emulating Complex SNN Algorithms. In: Tempesti, G., Tyrrell, A.M., Miller, J.F. (eds) Evolvable Systems: From Biology to Hardware. ICES 2010. Lecture Notes in Computer Science, vol 6274. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-15323-5_13
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DOI: https://doi.org/10.1007/978-3-642-15323-5_13
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