Abstract
In this paper we focus on the framework for aggregating adaptively computing resources in different enterprises for computation intensive applications. Concept and implementation of web-based collaborative system was presented to speed up fault simulation and to overcome the problem of memory limits in the case of very large digital circuits. Issues of task partitioning, task allocation, load balancing were handled, credit based priority concept was introduced. Experimental results show feasibility of the solution and gain in performance.
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Ivask, E., Devadze, S., Ubar, R. (2010). Collaborative Distributed Fault Simulation for Digital Electronic Circuits. In: Essaaidi, M., Malgeri, M., Badica, C. (eds) Intelligent Distributed Computing IV. Studies in Computational Intelligence, vol 315. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-15211-5_8
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DOI: https://doi.org/10.1007/978-3-642-15211-5_8
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-15210-8
Online ISBN: 978-3-642-15211-5
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