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Design of System Bus Interface and Inter-connection of SoC-Based CABAC Encoder

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Entropy Coders of the H.264/AVC Standard

Part of the book series: Signals and Communication Technology ((SCT))

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Abstract

As introduced in Chap. 4 one step of the SoC-based entropy coder design flow is SoC features introduction. Design of system bus interface for the CABAC encoder enhances portability and reusability of the design in the SoC video encoder system. In this chapter, design of master and slave interfaces of WISHBONE Wishbone system bus of CABAC encoder is discussed after the introduction of WISHBONE system bus specifications. The crossbar system bus inter-connection is also designed, which enables convenient integration of the proposed CABAC encoder with other IP blocks in the H.264/AVC encoding system.

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References

  1. Weber M (2002) Arbiters: design ideas and coding styles. In: Proceedings of SNUG of synopsys, Boston, MA

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  2. WISHBONE system-on-a-chip interconnection architecture for portable IP cores, revision B.3 specification, Vol. OPENCORES, 2002

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Correspondence to Xiaohua Tian .

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© 2011 Springer-Verlag Berlin Heidelberg

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Tian, X., Le, T.M., Lian, Y. (2011). Design of System Bus Interface and Inter-connection of SoC-Based CABAC Encoder. In: Entropy Coders of the H.264/AVC Standard. Signals and Communication Technology. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-14703-6_6

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  • DOI: https://doi.org/10.1007/978-3-642-14703-6_6

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-14702-9

  • Online ISBN: 978-3-642-14703-6

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