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Pipelining Architecture of AES Encryption and Key Generation with Search Based Memory

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Recent Trends in Network Security and Applications (CNSA 2010)

Part of the book series: Communications in Computer and Information Science ((CCIS,volume 89))

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Abstract

A high speed security algorithm is always important for wired/wireless environment.  The symmetric block cipher plays a major role in the bulk data encryption. One of the best existing symmetric security algorithms to provide data security is AES. AES has the advantage of being implemented in both hardware and software. We implement the AES in hardware because the hardware implementation has the advantage of increased throughput and offers better security.  In order to reduce the constraint on the hardware resources while implementing the look-up table based s-box we propose a search based s-box architecture. Also the pipelined architecture of the AES algorithm is used in order to increase the throughput of the algorithm. The key schedule algorithm of the AES encryption is also pipelined.

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References

  1. Elbirt, J., Yip, W., Chetwynd, B., Paar, C.: An FPGA Implementation and Performance evaluation of the AES Block Cipher Candidate Algorithm Finalist. In: The third AES Conference (AES3), New York (April 2000), http://csrc.nist.gov

  2. Elbirt, A.J., Yip, W., Chetwynd, B., Paar, C.: An FPGA Implementation and Performance evaluation of the AES Block Cipher Candidate Algorithm Finalist. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 9(4) (August 2001)

    Google Scholar 

  3. Zhang, X., Parhi, K.K.: Implementation Approaches for the Advanced Encryption Standard Algorithm. IEEE Circuits and Systems Magazine 2(4), 24–46 (fourth quarter 2002)

    Article  Google Scholar 

  4. Gaj, K., Chodowiec, P.: Hardware performance of the AES finalists survey and analysis of results, citeseer.ist.psu.edu/460345.html

  5. National Institute of Standards and Technology, Specification for the Advanced Encryption Standard (AES). FIPS PUB 197 (2001), http://csrc.nist.gov

  6. Stallings, W.: Cryptography and Network Security- Principles and Practice, 3rd edn. Pearson Education, London

    Google Scholar 

  7. Rabaey, J.M.: Digital Integrated Circuits. Prentice-Hall, Englewood Cliffs (1996)

    Google Scholar 

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© 2010 Springer-Verlag Berlin Heidelberg

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Subashri, T., Arunachalam, R., Gokul Vinoth Kumar, B., Vaidehi, V. (2010). Pipelining Architecture of AES Encryption and Key Generation with Search Based Memory. In: Meghanathan, N., Boumerdassi, S., Chaki, N., Nagamalai, D. (eds) Recent Trends in Network Security and Applications. CNSA 2010. Communications in Computer and Information Science, vol 89. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-14478-3_23

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  • DOI: https://doi.org/10.1007/978-3-642-14478-3_23

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-14477-6

  • Online ISBN: 978-3-642-14478-3

  • eBook Packages: Computer ScienceComputer Science (R0)

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