Computation of Two-phase Flow in Flip-chip Packaging Using Level Set Method

Abstract

In flip-chip packaging technology, the underfill encapsulation is one of the important processes to obtain a significant improvement in fatigue lifetime for the solder joints between IC chip and substrate. The advanced design of electronic devices aiming at the enhancement of the performance involves the increase of the number of solder bumps, smaller size of the IC chip and smaller gap height between IC chip and substrate. That leads to various problems caused by the flow behavior, such as voids in underfill and mis-placed IC chip. The numerical analysis is more and more strongly required for simulating the underfill flow behavior, including the condition of dispensing the underfill material on the substrate. In fact, it is desirable to predict the filling time, the final fillet shape formed around IC chip and the occurrence of air trap especially around the solder bump in the underfill process, considering the effect of contact angle, viscosity and surface tension of the underfill material for increasing the reliability of flip-chip packaging.