Skip to main content

Negative Difference Resistance and Its Application to Construct Boolean Logic Circuits

  • Conference paper
Computer Networks (CN 2010)

Part of the book series: Communications in Computer and Information Science ((CCIS,volume 79))

Included in the following conference series:

Abstract

Electronic circuits based on nanodevices and quantum effect are the future of logic circuits design. Today’s technology allows constructing resonant tunneling diodes, quantum cellular automata and nanowires/nanoribbons that are the elementary components of threshold gates. However, synthesizing a threshold circuit for an arbitrary logic function is still a challenging task where no efficient algorithms exist. This paper focuses on Generalised Threshold Gates (GTG), giving the overview of threshold circuit synthesis methods and presenting an algorithm that considerably simplifies the task in case of GTG circuits.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 39.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. ITRS: Process integration, devices and structures. In: Report on international technology roadmap for semiconductors, 2009 edition. International Technology Roadmap for Semiconductors (2009)

    Google Scholar 

  2. ITRS: Emerging research devices. In: Report on international technology roadmap for semiconductors, 2009 edition. International Technology Roadmap for Semiconductors (2009)

    Google Scholar 

  3. Wu, C.Y., Lai, K.N.: Integrated Λ-type differential negative resistance MOSFET device. IEEE Journal of Solid-State Circuits 14(6), 1094–1101 (1979)

    Article  Google Scholar 

  4. Guo, W.L., Wang, W., Niu, P.J., Li, X., Yu, X., Mao, L., Liu, H., Yang, G., Song, R.: CMOS-NDR transistor. In: 9th International Conference on Solid-State and Integrated-Circuit Technology, ICSICT 2008, October 2008, pp. 92–95 (2008)

    Google Scholar 

  5. Kwang-Jow, G., Cher-Shiung, T., Dong-Shong, L.: Design and characterization of the negative differential resistance circuits using the CMOS and BiCMOS process. Analog Integrated Circuits and Signal Processing 62(1), 63–68 (2010)

    Article  Google Scholar 

  6. Siu, K.Y., Roychowdhury, V.P., Kailath, T.: Depth-Size Tradeoffs for Neural Computation. IEEE Trans. Comput. 40(12), 1402–1412 (1991)

    Article  MathSciNet  Google Scholar 

  7. Avedillo, M.J., Quintana, J.M.: A Threshold Logic Synthesis Tool for RTD Circuits. In: DSD 2004: Proceedings of the Digital System Design, EUROMICRO Systems, pp. 624–627 (2004)

    Google Scholar 

  8. Zhang, R., Gupta, P., Zhong, L., Jha, N.K.: Synthesis and Optimization of Threshold Logic Networks with Application to Nanotechnologies. In: DATE 2004: Proceedings of the conference on Design, automation and test in Europe, p. 20904. IEEE Computer Society, Washington (2004)

    Google Scholar 

  9. Wang, Z.F., Zheng, H., Shi, Q.W., Chen, J.: Emerging nanodevice paradigm: Graphene-based electronics for nanoscale computing. J. Emerg. Technol. Comput. Syst. 5(1), 1–19 (2009)

    Google Scholar 

  10. Avedillo, M.J., Quintana, J.M., Pettenghi, H.: Logic Models Supporting the Design of MOBILE-based RTD Circuits. In: ASAP 2005: Proceedings of the 2005 IEEE International Conference on Application-Specific Systems, Architecture Processors, pp. 254–259. IEEE Computer Society Press, Washington (2005)

    Google Scholar 

  11. Pettenghi, H., Avedillo, M.J., Quintana, J.M.: Using multi-threshold threshold gates in RTD-based logic design: A case study. Microelectron J. 39(2), 241–247 (2008)

    Google Scholar 

  12. Berezowski, K.S.: Compact binary logic circuits design using negative differential resistance devices. IET Electr. Lett. 42(16), 902–903 (2006)

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2010 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Nikodem, M., Bawiec, M.A., Surmacz, T.R. (2010). Negative Difference Resistance and Its Application to Construct Boolean Logic Circuits . In: Kwiecień, A., Gaj, P., Stera, P. (eds) Computer Networks. CN 2010. Communications in Computer and Information Science, vol 79. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-13861-4_4

Download citation

  • DOI: https://doi.org/10.1007/978-3-642-13861-4_4

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-13860-7

  • Online ISBN: 978-3-642-13861-4

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics