Abstract
We use algorithmic tools for graphs of small treewidth to address questions in complexity theory. For both arithmetic and Boolean circuits, we show that any circuit of size n O(1) and treewidth O(logi n) can be simulated by a circuit of width O(logi + 1 n) and size n c, where c = O(1), if i = 0, and c = O(loglogn) otherwise. For our main construction, we prove that multiplicatively disjoint arithmetic circuits of size n O(1) and treewidth k can be simulated by bounded fan-in arithmetic formulas of depth O(k 2logn). From this we derive an analogous statement for syntactically multilinear arithmetic circuits, which strengthens the central theorem of [14]. As another application, we derive that constant width arithmetic circuits of size n O(1) can be balanced to depth O(logn), provided certain restrictions are made on the use of iterated multiplication. Also from our main construction, we derive that Boolean bounded fan-in circuits of size n O(1) and treewidth k can be simulated by bounded fan-in formulas of depth O(k 2logn). This strengthens in the non-uniform setting the known inclusion that SC0 ⊆ NC1. Finally, we apply our construction to show that Reachability and Circuit Value Problem for some treewidth restricted cases can be solved in LogDCFL.
This work was supported in part by the National Natural Science Foundation of China Grant 60553001, and the National Basic Research Program of China Grant 2007CB807900, 2007CB807901.
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References
Allender, E.: Reachability problems: An update. In: Cooper, S.B., Löwe, B., Sorbi, A. (eds.) CiE 2007. LNCS, vol. 4497, pp. 25–27. Springer, Heidelberg (2007)
Arvind, V., Joglekar, P., Srinivasan, S.: On lower bounds for constant width arithmetic circuits. In: Dong, Y., Du, D.-Z., Ibarra, O. (eds.) ISAAC 2009. LNCS, vol. 5878, pp. 637–646. Springer, Heidelberg (2009)
Barrington, D., Lu, C.-J., Miltersen, P., Skyum, S.: On monotone planar circuits. In: IEEE Conference on Computational Complexity, pp. 24–31 (1999)
Barrington, D.M.: Bounded-width polynomial-size branching programs recognize exactly those languages in NC1. In: Proc. 18th STOC, pp. 1–5 (1986)
Ben-Or, M., Cleve, R.: Computing algebraic formulas using a constant number of registers. In: Proc. 20th STOC, pp. 254–257 (1988)
Bodlaender, H.L.: NC-algorithms for graphs with small treewidth. In: Nagl, M. (ed.) WG 1989. LNCS, vol. 411, pp. 1–10. Springer, Heidelberg (1990)
Brent, R.: The parallel evaluation of general arithmetic expressions. J. Assn. Comp. Mach. 21, 201–206 (1974)
Bürgisser, P., Claussen, M., Shokrollahi, M.: Algebraic Complexity Theory. Springer, Heidelberg (1997)
Goldschlager, L.M.: The monotone and planar circuit value problems are logspace complete for P. SIGACT News 9(2), 25–29 (1977)
Jansen, M., Rao, B.: Simulation of arithmetical circuits by branching programs with preservation of constant width and syntactic multilinearity. In: Frid, A., Morozov, A., Rybalchenko, A., Wagner, K.W. (eds.) Computer Science - Theory and Applications. LNCS, vol. 5675, pp. 179–190. Springer, Heidelberg (2009)
Jones, N.: Space-bounded reducibility among combinatorial problems. J. Comp. Sys. Sci. 11, 68–85 (1975); Corrigendum. J. Comp. Sys. Sci. 15, 241 (1977)
Limaye, N., Mahajan, M., Sarma, J.: Upper bounds for monotone planar circuit value and variants. Computational Complexity 18(3), 377–412 (2009)
Mahajan, M.: Polynomial size log depth circuits: between NC1 and AC1. Technical Report 91, BEATCS Computational Complexity Column (2007)
Mahajan, M., Rao, B.: Arithmetic circuits, syntactic multilinearity, and the limitations of skew formulae. In: Ochmański, E., Tyszkiewicz, J. (eds.) MFCS 2008. LNCS, vol. 5162, pp. 455–466. Springer, Heidelberg (2008)
Mahajan, M., Rao, B.: Small-space analogues of Valiant’s classes. In: Gȩbala, M. (ed.) FCT 2009. LNCS, vol. 5699, pp. 455–466. Springer, Heidelberg (2009)
Malod, G., Portier, N.: Characterizing valiant’s algebraic complexity classes. J. Complex. 24(1), 16–38 (2008)
Raz, R.: Separation of multilinear circuit and formula size. In: Proc. 45th Annual IEEE Symposium on Foundations of Computer Science, pp. 344–351 (2004)
Reingold, O.: Undirected st-connectivity in log-space. In: Proc. 37th Annual ACM Symposium on the Theory of Computing, pp. 376–385 (2005)
Savitch, W.: Maze recognizing automata and nondeterministic tape complexity. J. Comput. Syst. Sci. 7(4), 389–403 (1973)
Valiant, L., Skyum, S., Berkowitz, S., Rackoff, C.: Fast parallel computation of polynomials using few processors. SIAM J. Comput. 12, 641–644 (1983)
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Jansen, M., Sarma M.N., J. (2010). Balancing Bounded Treewidth Circuits. In: Ablayev, F., Mayr, E.W. (eds) Computer Science – Theory and Applications. CSR 2010. Lecture Notes in Computer Science, vol 6072. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-13182-0_21
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