Abstract
Although the behavior of several RF circuit blocks can be accurately evaluated via transistor-level simulations, the design space exploration is limited by the high computational cost of such simulations. Therefore, cheap-to-evaluate surrogate models of the circuit simulator are introduced. This paper presents some results of a feasibility study concerning the development of surrogate models of low noise amplifiers.
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De Tommasi, L., Gorissen, D., Croon, J., Dhaene, T. (2010). Surrogate Modeling of Low Noise Amplifiers Based on Transistor Level Simulations. In: Roos, J., Costa, L. (eds) Scientific Computing in Electrical Engineering SCEE 2008. Mathematics in Industry(), vol 14. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-12294-1_29
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DOI: https://doi.org/10.1007/978-3-642-12294-1_29
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Online ISBN: 978-3-642-12294-1
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