Skip to main content

MEMS Dynamic Optically Reconfigurable Gate Array Usable under a Space Radiation Environment

  • Conference paper

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 5992))

Abstract

Embedded devices used for spacecraft, satellites, and space stations are vulnerable to the effects of high-energy charged particles. To resolve single-event latch-up (SEL)-associated troubles more flexibly using limited hardware resources in a space environment, reconfigurable devices such as field programmable gate arrays (FPGAs) are suitable. However, such reconfigurable systems present the shortcoming that the circuit itself on the gate array is not robust. The configuration context on a configuration SRAM also suffers from single-event upsets (SEUs) and SELs. This paper therefore proposes an MEMS dynamic optically reconfigurable gate array that is usable under a space radiation environment. The technique enables rapid recovery of a programmable device that has been damaged by high-energy charged particles. It uses incorrect configuration data including some error bits that had been damaged by particles. The configuration data are transferred using wireless communications and are retained on an EEPROM/SRAM.

This is a preview of subscription content, log in via an institution.

Buying options

Chapter
USD   29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD   39.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD   54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Learn about institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. Redant, S., Marec, R., Baguena, L., Liegeon, E., Soucarre, J., Van Thielen, B., Beeckman, G., Ribeiro, P., Fernandez-Leon, A., Glass, B.: Radiation Test Results on First Silicon in the Design Against Radiation Effects (DARE) Library. IEEE Trans. on Nuclear Science 52(5), 1550–1554 (2005)

    Article  Google Scholar 

  2. Makihara, A., Sakaide, Y., Tsuchiya, Y., Arimitsu, T., Asai, H., Iide, Y., Shindou, H., Kuboyama, S., Matsuda, S.: Single-Event Effects in 0.18 um CMOS Commercial Processes. IEEE Trans. on Nuclear Science 50(6), 2135–2138 (2003)

    Article  Google Scholar 

  3. Ikeda, N., Shindou, H., Iide, Y., Asai, H., Kubo, S., Matsuda, S.: Evaluation of the Errors of Commercial Semiconductor Devices in a Space Radiation Environment. Trans. of the Institute of Electronics, Information and Communication Engineers J88-B(1), 108–116 (2005)

    Google Scholar 

  4. Lin, Y., He, L.: Devices and architecture concurrent optimization for FPGA transient soft error rate. In: International Conference on Computer Aided Design (2007)

    Google Scholar 

  5. Stroud, C.E.: Reliability of Majority Voting Based VLSI Fault-Tolerant Circuits. IEEE Trans. on VLSI Systems 2(4), 516–521 (1994)

    Article  Google Scholar 

  6. Radu, M., Pitica, D., Posteuca, C.: Reliability and failure analysis of voting circuits in hardware redundant design. In: International Symposium on Electronic Materials and Packaging, pp. 421–423 (2000)

    Google Scholar 

  7. Miller, G., Carmichael, C., Jet Propulsion Labs: Single-Event Upset Mitigation for Xilinx FPGA Block Memories, XILINX Application Note, Virtex-II FPGAs (2007)

    Google Scholar 

  8. Barbour, A.E.: A reconfigurable fault-tolerant system. In: Midwest Symposium on Circuits and Systems, pp. 189–194 (1992)

    Google Scholar 

  9. Peter, J.-L.: ECC design of a custom DRAM storage unit. In: IEEE VLSI Test Symposium, pp. 171–173 (1993)

    Google Scholar 

  10. Mumbru, J., Panotopoulos, G., Psaltis, D., An, X., Mok, F., Ay, S., Barna, S., Fossum, E.: Optically Programmable Gate Array. In: SPIE of Optics in Computing 2000, vol. 4089, pp. 763–771 (2000)

    Google Scholar 

  11. Yamaguchi, N., Watanabe, M.: Liquid crystal holographic configurations for ORGAs. Applied Optics 47(28), 4692–4700 (2008)

    Article  Google Scholar 

  12. Seto, D., Watanabe, M.: A dynamic optically reconfigurable gate array - perfect emulation. IEEE Journal of Quantum Electronics 44(5), 493–500 (2008)

    Article  Google Scholar 

  13. Watanabe, M., Kobayashi, F.: Dynamic Optically Reconfigurable Gate Array. Japanese Journal of Applied Physics 45(4B), 3510–3515 (2006)

    Article  Google Scholar 

  14. Kubota, S., Watanabe, M.: Programmable Optically Reconfigurable Gate Array Architecture and its writer. Applied Optics 48(2), 302–308 (2009)

    Article  Google Scholar 

  15. Yatagai, T.: Optical space-variant logic-gate array based on spatial encoding technique. Opt. Lett. 11, 260–262 (1986)

    Article  Google Scholar 

  16. Fukushima, S., Kurokawa, T.: Programmable hybrid parallel processing for real-time digital logic operations. Opt. Lett. 12, 965–967 (1987)

    Article  Google Scholar 

  17. Texas Instruments, DLP, http://www.ti.com/

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2010 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Seto, D., Watanabe, M. (2010). MEMS Dynamic Optically Reconfigurable Gate Array Usable under a Space Radiation Environment. In: Sirisuk, P., Morgan, F., El-Ghazawi, T., Amano, H. (eds) Reconfigurable Computing: Architectures, Tools and Applications. ARC 2010. Lecture Notes in Computer Science, vol 5992. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-12133-3_14

Download citation

  • DOI: https://doi.org/10.1007/978-3-642-12133-3_14

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-12132-6

  • Online ISBN: 978-3-642-12133-3

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics