Abstract
This paper designs a special schematic of signal separated circuit, which can distinguish and separate signals of 1-wire bus according to its sources, the decoder of 1-wire bus based on ARM and special schematic analysis signals’ timing period runing through 1-wire, finally output procedure and details of 1-wire.
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Wu, Y. et al. (2010). Research and Implementation of a Decoder of 1-Wire Bus. In: Wu, Y., Luo, Q. (eds) High Performance Networking, Computing, Communication Systems, and Mathematical Foundations. ICHCC ICTMF 2009 2009. Communications in Computer and Information Science, vol 66. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-11618-6_1
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DOI: https://doi.org/10.1007/978-3-642-11618-6_1
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-11617-9
Online ISBN: 978-3-642-11618-6
eBook Packages: Computer ScienceComputer Science (R0)