Zusammenfassung
Dieses einleitende Kapitel vermittelt einen Einblick, warum die Verifikation ein unverzichtbarer Bestandteil des Entwurfs von digitalen Hardware/Software-Systemen darstellt. Dabei werden die wesentlichen Aspekte der Verifikation vorgestellt.
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Lee, E. A. und A. L. Sangiovanni-Vincentelli: A Framework for Comparing Models of Computation. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 17(12):1217–1229, 1998.
Evans, A., A. Silburt, G. Vrckovnik, T. Brown, M. Dufresne, G. Hall, T. Ho und Y. Liu: Functional Verification of Large ASICs. In: Proceedings of the Design Automation Conference (DAC), Seiten 650–655, 1998.
Floyd, R. W.: Assigning Meaning to Programs. In: Proceedings of the Symposium of Applied Mathematics, Seiten 19–32, 1967.
Zhu, C., Z. P. Gu, R. P. Dick und L. Shang: Reliable Multiprocessor System-On-Chip Synthesis. In: Proceedings of the Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), Seiten 239–244, 2007.
Wolf, Wayne, Ahmed Amine Jerraya und Grant Martin: Multiprocessor System-on-Chip (MPSoC) Technology. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 27(10):1701–1713, 2008.
OSCI TLM Working Group: OSCI TLM-2.0 Language Reference Manual, 2009. Version JA32, http://www.systemc.org.
Kienhuis, B., E. Deprettere, K. Vissers und P. van der Wolf: An Approach for Quantitative Analysis of Application-Specific Dataflow Architectures. In: Proceedings of the Conference on Application-Specific Systems, Architectures and Processors (ASAP), Seiten 338–349, 1997.
Möller, K.-H.: Ausgangsdaten für Qualitätsmetriken – Eine Fundgrube für Analysen. In: Ebert, C. und R. Dumke(Herausgeber): Software-Metriken in der Praxis, Seiten 105 – 116. Springer, Berlin, 1996.
Gerstlauer, A., C. Haubelt, A. D. Pimentel, T. P. Stefanov, D. D. Gajski und J. Teich: Electronic System-Level Synthesis Methodologies. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 28(10):1517–1530, 2009.
Kripke, S. A.: A Completeness Theorem in Modal Logic. The Journal of Symbolic Logic, 24(1):1–14, 1959.
Moore, G.: Cramming More Components onto Integrated Circuits. Electronics, 38:114–117, 1965.
Gajski, D. D., J. Zhu, R. Dömer, A. Gerstlauer und S. Zhao: SpecC: Specification Language and Design Methodology. Kluwer Academic Publishers, 2000.
Schneider, K.: Verification of Reactive Systems – Formal Methods and Algorithms. Springer, Berlin, Heidelberg, 2004.
Cook, S. A.: The Complexity of Theorem-Proving Procedures. In: Proceedings of the Symposium on Theory of Computing (STOC), Seiten 151–158, 1971.
Pasricha, S., N. Dutt, E. Bozorgzadeh und M. Ben-Romdhane: FABSYN: Floorplan-aware Bus Architecture Synthesis. IEEE Transactions on Very Large Scale Integrated Systems, 14(3):241–253, 2006.
Gajski, D. D., F. Vahid, S. Narayan und J. Gong: Specification and Design of Embedded Systems. Prentice-Hall, Inc., Upper Saddle River, NJ, U.S.A., 1994.
Thiele, L. und E. Wandeler: Performance Analysis of Distributed Embedded Systems. In: Embedded Systems Handbook, Seiten 15.1–15.18. CRC Press, Boca Raton, FL, 2006.
Pnueli, A.: The Temporal Logic of Programs. In: Proceedings of the Symposium on Foundations of Computer Science, Seiten 46–57, 1977.
Hoare, C. A. R.: An Axiomatic Basis for Computer Programming. Communications of the ACM, 12(10):576–580, 1969.
Bergeron, J.: Writing Testbenches: Functional Verification of HDL Models. Kluwer Academic Publishers, Dordrecht, 2003. 2. Auflage.
Sebastiani, Roberto: Lazy Satisfiability Modulo Theories. Journal on Satisfiability, Boolean Modeling and Computation, 3:141–224, 2007.
Davis, M., G. Logemann und D. Loveland: A Machine Program for Theorem-Proving. Communications of the ACM, 5(7):394–397, 1962.
Teich, J. und C. Haubelt: Digitale Hardware/Software-Systeme – Synthese und Optimierung. Springer, Berlin, Heidelberg, 2007. 2. erweiterte Auflage.
Brand, D.: Verification of Large Synthesized Designs. In: Proceedings of the International Conference on Computer-Aided Design (ICCAD), Seiten 534–537, 1993.
Turing, A.: On Computable Numbers With An Application To The Entscheidungs Problem. In: Proceedings of The London Mathematical Society, Band 42 der Reihe 2, Seiten 230–265, 1937.
Liggesmeyer, P.: Software-Qualität – Testen, Analysieren und Verifizieren von Software. Spektrum Akademischer Verlag, Heidelberg, Berlin, 2002.
Gajski, D. D. und R. H. Kuhn: New VLSI Tools. IEEE Computer, 16(12):11–14, 1983.
SystemC Verification Working Group: SystemC Verification Standard Specification, 2006. Version 1.0e, http://www.systemc.org.
Kernighan, B. W. und D. Ritchie: The C Programming Language. Prentice-Hall, Inc., Upper Saddle River, NJ, U.S.A., 1988. 2. Auflage.
Gödel, Kurt: über formal unentscheidbare Sätze der Principia Mathematica und verwandter Systeme I. Monatshefte für Mathematik und Physik, 38:173–198, 1931.
IEEE: IEEE Standard Glossary of Software Engineering Terminology. IEEE Std 610.12-1990, 1990.
Strahm, T.: Logik in Informatik, Mathematik und Philosophie, 1999. Vortrag anlässlich der Veranstaltung Theodor-Kocher-Preis 1998 der Universität Bern.
Bryant, R. E.: Graph-Based Algorithms for Boolean Function Manipulation. IEEE Transactions on Computers, 35(8):677–691, 1986.
ITRS: International Technology Roadmap for Semiconductors – System Drivers. Technischer Bericht, ITRS, 2007. http://www.itrs.net/.
Lee, E. A. und A. L. Sangiovanni-Vincentelli: A Framework for Comparing Models of Computation. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 17(12):1217–1229, 1998.
Evans, A., A. Silburt, G. Vrckovnik, T. Brown, M. Dufresne, G. Hall, T. Ho und Y. Liu: Functional Verification of Large ASICs. In: Proceedings of the Design Automation Conference (DAC), Seiten 650–655, 1998.
Floyd, R. W.: Assigning Meaning to Programs. In: Proceedings of the Symposium of Applied Mathematics, Seiten 19–32, 1967.
Zhu, C., Z. P. Gu, R. P. Dick und L. Shang: Reliable Multiprocessor System-On-Chip Synthesis. In: Proceedings of the Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), Seiten 239–244, 2007.
Wolf, Wayne, Ahmed Amine Jerraya und Grant Martin: Multiprocessor System-on-Chip (MPSoC) Technology. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 27(10):1701–1713, 2008.
OSCI TLM Working Group: OSCI TLM-2.0 Language Reference Manual, 2009. Version JA32, http://www.systemc.org.
Kienhuis, B., E. Deprettere, K. Vissers und P. van der Wolf: An Approach for Quantitative Analysis of Application-Specific Dataflow Architectures. In: Proceedings of the Conference on Application-Specific Systems, Architectures and Processors (ASAP), Seiten 338–349, 1997.
Möller, K.-H.: Ausgangsdaten für Qualitätsmetriken – Eine Fundgrube für Analysen. In: Ebert, C. und R. Dumke(Herausgeber): Software-Metriken in der Praxis, Seiten 105 – 116. Springer, Berlin, 1996.
Gerstlauer, A., C. Haubelt, A. D. Pimentel, T. P. Stefanov, D. D. Gajski und J. Teich: Electronic System-Level Synthesis Methodologies. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 28(10):1517–1530, 2009.
Kripke, S. A.: A Completeness Theorem in Modal Logic. The Journal of Symbolic Logic, 24(1):1–14, 1959.
Moore, G.: Cramming More Components onto Integrated Circuits. Electronics, 38:114–117, 1965.
Gajski, D. D., J. Zhu, R. Dömer, A. Gerstlauer und S. Zhao: SpecC: Specification Language and Design Methodology. Kluwer Academic Publishers, 2000.
Schneider, K.: Verification of Reactive Systems – Formal Methods and Algorithms. Springer, Berlin, Heidelberg, 2004.
Cook, S. A.: The Complexity of Theorem-Proving Procedures. In: Proceedings of the Symposium on Theory of Computing (STOC), Seiten 151–158, 1971.
Pasricha, S., N. Dutt, E. Bozorgzadeh und M. Ben-Romdhane: FABSYN: Floorplan-aware Bus Architecture Synthesis. IEEE Transactions on Very Large Scale Integrated Systems, 14(3):241–253, 2006.
Gajski, D. D., F. Vahid, S. Narayan und J. Gong: Specification and Design of Embedded Systems. Prentice-Hall, Inc., Upper Saddle River, NJ, U.S.A., 1994.
Thiele, L. und E. Wandeler: Performance Analysis of Distributed Embedded Systems. In: Embedded Systems Handbook, Seiten 15.1–15.18. CRC Press, Boca Raton, FL, 2006.
Pnueli, A.: The Temporal Logic of Programs. In: Proceedings of the Symposium on Foundations of Computer Science, Seiten 46–57, 1977.
Hoare, C. A. R.: An Axiomatic Basis for Computer Programming. Communications of the ACM, 12(10):576–580, 1969.
Bergeron, J.: Writing Testbenches: Functional Verification of HDL Models. Kluwer Academic Publishers, Dordrecht, 2003. 2. Auflage.
Sebastiani, Roberto: Lazy Satisfiability Modulo Theories. Journal on Satisfiability, Boolean Modeling and Computation, 3:141–224, 2007.
Davis, M., G. Logemann und D. Loveland: A Machine Program for Theorem-Proving. Communications of the ACM, 5(7):394–397, 1962.
Teich, J. und C. Haubelt: Digitale Hardware/Software-Systeme – Synthese und Optimierung. Springer, Berlin, Heidelberg, 2007. 2. erweiterte Auflage.
Brand, D.: Verification of Large Synthesized Designs. In: Proceedings of the International Conference on Computer-Aided Design (ICCAD), Seiten 534–537, 1993.
Turing, A.: On Computable Numbers With An Application To The Entscheidungs Problem. In: Proceedings of The London Mathematical Society, Band 42 der Reihe 2, Seiten 230–265, 1937.
Liggesmeyer, P.: Software-Qualität – Testen, Analysieren und Verifizieren von Software. Spektrum Akademischer Verlag, Heidelberg, Berlin, 2002.
Gajski, D. D. und R. H. Kuhn: New VLSI Tools. IEEE Computer, 16(12):11–14, 1983.
SystemC Verification Working Group: SystemC Verification Standard Specification, 2006. Version 1.0e, http://www.systemc.org.
Kernighan, B. W. und D. Ritchie: The C Programming Language. Prentice-Hall, Inc., Upper Saddle River, NJ, U.S.A., 1988. 2. Auflage.
Gödel, Kurt: über formal unentscheidbare Sätze der Principia Mathematica und verwandter Systeme I. Monatshefte für Mathematik und Physik, 38:173–198, 1931.
IEEE: IEEE Standard Glossary of Software Engineering Terminology. IEEE Std 610.12-1990, 1990.
Strahm, T.: Logik in Informatik, Mathematik und Philosophie, 1999. Vortrag anlässlich der Veranstaltung Theodor-Kocher-Preis 1998 der Universität Bern.
Bryant, R. E.: Graph-Based Algorithms for Boolean Function Manipulation. IEEE Transactions on Computers, 35(8):677–691, 1986.
ITRS: International Technology Roadmap for Semiconductors – System Drivers. Technischer Bericht, ITRS, 2007. http://www.itrs.net/.
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Haubelt, C., Teich, J. (2010). Einleitung. In: Digitale Hardware/Software-Systeme. eXamen.press, vol 0. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-05356-6_1
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