Advertisement

SDL/Virtual Prototype Co-design for Rapid Architectural Exploration of a Mobile Phone Platform

  • Shadi Traboulsi
  • Felix Bruns
  • Anas Showk
  • David Szczesny
  • Sebastian Hessel
  • Elizabeth Gonzalez
  • Attila Bilgic
Part of the Lecture Notes in Computer Science book series (LNCS, volume 5719)

Abstract

In this paper we present a new hardware/software co-design methodology for embedded systems, where software components written in Specification and Description Language (SDL) execute on a soft-model of a hardware platform, a so called Virtual Prototype (VP). The proposed approach enables fast exploration of different hardware and software design options at high level of abstraction in order to make early system design decisions. We prove our approach by considering the Long Term Evolution (LTE) communication stack as a use case for the architectural exploration of our mobile terminal. The open source L4/Fiasco microkernel is deployed as a Real-Time OS to run the modem application represented by the LTE SDL-modelled protocol stack. We profile and analyze the system performance by measuring average and maximum packet processing times under various hardware and software conditions. Thereby, we are able to rapidly obtain an efficient design point that provides 80 % packet processing speedup against other unoptimized implementations while meeting the required timing constraints and maintaining a good balance between area and power consumption.

Keywords

hardware/software co-design rapid system prototyping design-space exploration mobile terminal SDL 

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    Grötker, T., Liao, S., Martin, G., Swan, S.: System Design with SystemC. Kluwer Academic Publishers, Boston (2002)Google Scholar
  2. 2.
    Thiele, L., Wandeler, E.: Performance Analysis of Distributed Embedded Systems. In: Zurawski, R. (ed.) Embedded Systems Handbook, CRC Press, Boca Raton (2005)Google Scholar
  3. 3.
    Ernst, R., Henkel, J., Benner, T.: Hardware-Software Cosynthesis for Microcontrollers. IEEE Design & Test of Computers 10(4), 64–75 (1993)CrossRefGoogle Scholar
  4. 4.
    Thomas, D.E., Adams, J.K., Schmit, H.: A Model and Methodology for Hardware-Software Codesign. IEEE Design & Test of Computers 10(3), 6–15 (1993)CrossRefGoogle Scholar
  5. 5.
    Chiodo, M., Giusto, P., Jurecska, A., Hsieh, H.C., Vincentelli, A.S., Lavagno, L.: Hardware-Software Codesign of Embedded Systems. IEEE Micro. 14(4), 26–36 (1994)CrossRefGoogle Scholar
  6. 6.
    Gajski, D.D., Vahid, F.: Specification and Design of Embedded Hardware-Software Systems. IEEE Design & Test of Computers 12(1), 53–67 (1995)CrossRefGoogle Scholar
  7. 7.
    Gong, J., Gajski, D.D., Narayan, S.: Software Estimation using a Generic-Processor Model. In: Proceedings of the 1995 European Conference on Design and Test, p. 498. IEEE Computer Society, Washington, DC (1995)CrossRefGoogle Scholar
  8. 8.
    Vahid, F., Gajski, D.D.: Specification Partitioning for System Design. In: Proceedings of the 29th ACM/IEEE Design Automation Conference, pp. 219–224. IEEE Computer Society Press, Los Alamitos (1992)CrossRefGoogle Scholar
  9. 9.
    Cai, L., Gajski, D.D.: Transaction Level Modeling: An Overview, http://www.cecs.uci.edu/conference_proceedings/isss_2003/cai_transaction.pdf
  10. 10.
    Donlin, A.: Transaction Level Modeling: Flows and Use Models. In: Hardware/Software Codesign and System Synthesis, 2004. CODES + ISSS 2004, pp. 75–80. ACM, New York (2004)CrossRefGoogle Scholar
  11. 11.
    Wild, T., Herkersdorf, A., Ohlendorf, R.: Performance Evaluation for System-on-Chip Architectures using Trace-based Transaction Level Simulation. In: Proceedings of the Conference on Design, Automation and Test in Europe, pp. 248–253. European Design and Automation Association, Leuven (2006)Google Scholar
  12. 12.
    Buck, J., Ha, S., Lee, E.A., Messerschmitt, D.G.: Ptolemy: A Framework for Simulating and Prototyping Heterogeneous Systems, http://ptolemy.eecs.berkeley.edu/publications/papers/94/JEurSim/JEurSim.pdf
  13. 13.
    Kohler, E., Morris, R., Chen, B., Jannotti, J., Kaashoek, F.M.: The Click Modular Router. ACM Trans. on Computer Systems 18(3), 263–297 (2000)CrossRefGoogle Scholar
  14. 14.
    Palesi, M.: Multi-Objective Design Space Exploration using Genetic Algorithms. In: Proceedings of the Tenth International Symposium on Hardware/Software Codesign, CODES 2002. ACM, New York (2002)Google Scholar
  15. 15.
    The VaST Systems Technology Corporation, http://www.vastsystems.com
  16. 16.
    RealView Platform Baseboard for the ARM11 MPCore, http://www.arm.com/products/DevTools/PB11MPCore.html
  17. 17.
    Silven, O., Jyrkkä, K.: Observations on Power-Efficiency Trends in Mobile Communication Devices. EURASIP Journal on Embedded Systems (2007)Google Scholar
  18. 18.
    Hessel, S., Bruns, F., Bilgic, A., Lackorzynski, A., Härtig, H., Hausner, J.: Acceleration of the L4/Fiasco Microkernel Using Scratchpad Memory. In: International Workshop on Virtualization in Mobile Computing, MobiVirt 2008. ACM, New York (2008)Google Scholar
  19. 19.
    Evolved Universal Terrestrial Radio Access (E-UTRA), 3GPP Specifications: Rel8 (December 2008), http://www.3gpp.org
  20. 20.
    Szczesny, D., Showk, A., Hessel, S., Hildebrand, U., Frascolla, V., Bilgic, A.: Performance Analysis of LTE Protocol Processing on an ARM based Mobile Platform. Accepted for 11th International Symposium on System-on-Chip (SoC 2009), Tampere, Finland (October 2009)Google Scholar
  21. 21.
    IBM® Rational® SDL SuiteTM, http://www.ibm.com/software/awdtools/sdlsuite/
  22. 22.
    The Fiasco Microkernel, http://os.inf.tu-dresden.de/fiasco

Copyright information

© Springer-Verlag Berlin Heidelberg 2009

Authors and Affiliations

  • Shadi Traboulsi
    • 1
  • Felix Bruns
    • 1
  • Anas Showk
    • 1
  • David Szczesny
    • 1
  • Sebastian Hessel
    • 1
  • Elizabeth Gonzalez
    • 1
  • Attila Bilgic
    • 1
  1. 1.Institute for Integrated SystemsRuhr-University of BochumBochumGermany

Personalised recommendations