Image Recognition in Analog VLSI with On-Chip Learning

  • Gonzalo Carvajal
  • Waldo Valenzuela
  • Miguel Figueroa
Part of the Lecture Notes in Computer Science book series (LNCS, volume 5768)


We present an analog-VLSI neural network for image recognition which features a dimensionality reduction network and a classification stage. We implement local learning rules to train the network on chip or program the coefficients from a computer, while compensating for the negative effects of device mismatch and circuit nonlinearity. Our experimental results show that the circuits perform closely to equivalent software implementations, reaching 87% accuracy for face classification and 89% for handwritten digit classification. The circuit dissipates 20mW and occupies 2.5mm2 of die area in a 0.35μm CMOS process.


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Copyright information

© Springer-Verlag Berlin Heidelberg 2009

Authors and Affiliations

  • Gonzalo Carvajal
    • 1
  • Waldo Valenzuela
    • 1
  • Miguel Figueroa
    • 1
  1. 1.Department of Electrical EngineeringUniversidad de ConcepciónChile

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