Advertisement

Image Recognition in Analog VLSI with On-Chip Learning

  • Gonzalo Carvajal
  • Waldo Valenzuela
  • Miguel Figueroa
Part of the Lecture Notes in Computer Science book series (LNCS, volume 5768)

Abstract

We present an analog-VLSI neural network for image recognition which features a dimensionality reduction network and a classification stage. We implement local learning rules to train the network on chip or program the coefficients from a computer, while compensating for the negative effects of device mismatch and circuit nonlinearity. Our experimental results show that the circuits perform closely to equivalent software implementations, reaching 87% accuracy for face classification and 89% for handwritten digit classification. The circuit dissipates 20mW and occupies 2.5mm2 of die area in a 0.35μm CMOS process.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    Belhumeur, P., Hespanha, J., Kriegman, D.J.: Eigenfaces vs. Fisherfaces: Recognition Using Class Specific Linear Projection. IEEE Transactions on Pattern Analysis and Machine Intelligence 19(7), 711–720 (1997)CrossRefGoogle Scholar
  2. 2.
    Carvajal, G., Figueroa, M., Bridges, S.: Effects of Analog-VLSI Hardware on the Performance of the LMS Algorithm. In: International Conference on Artificial Neural Networks (ICANN), Athens, Greece, September 10-14, pp. 963–973 (2006)Google Scholar
  3. 3.
    Carvajal, G., Valenzuela, W., Figueroa, M.: Subspace-Based Face Recognition in Analog VLSI. In: Advances in Neural Information Processing Systems 20, pp. 225–232. MIT Press, Cambridge (2008)Google Scholar
  4. 4.
    Delbruck, T.: Bump circuits for computing similarity and dissimilarity of analog voltages. In: Proc. of International Joint Conference on Neural Networks, Washington, DC, USA, pp. 475–479. IEEE Computer Society, Los Alamitos (1991)Google Scholar
  5. 5.
    Diamantaras, K.I., Kung, S.Y.: Principal Component Neural Networks: Theory and Aplications. Wiley Interscience, Hoboken (2001)zbMATHGoogle Scholar
  6. 6.
    Donckers, N., Dualibe, C., Verleysen, M.: Design of complementary low-power CMOS architectures for looser-take-all and winner-take-all. In: MICRONEURO 1999: Proc. of the 7th Intl. Conf. on Microelectronics for Neural, Fuzzy and Bio-Inspired Systems, Washington, DC, USA, p. 360. IEEE Computer Society, Los Alamitos (1999)CrossRefGoogle Scholar
  7. 7.
    Figueroa, M., Bridges, S., Diorio, C.: On-chip compensation of device-mismatch effects in analog VLSI neural networks. In: Advances in Neural Information Processing Systems 17. MIT Press, Cambridge (2005)Google Scholar
  8. 8.
    Oh, B.-J.: Face recognition using radial basis function network based on lda. In: IEC (Prague), pp. 255–259 (2005)Google Scholar
  9. 9.
    Prasanna, C.S.S., Sudha, N., Kamakoti, V.: A Principal Component Neural Network-Based Face Recognition System and Its ASIC Implementation. In: VLSI Design, pp. 795–798 (2005)Google Scholar
  10. 10.
    Shams, N., Hosseini, I., Sadri, M., Azarnasab, E.: Low Cost FPGA-Based Highly Accurate Face Recognition System Using Combined Wavelets Withs Subspace Methods. In: IEEE International Conference on Image Processing, pp. 2077–2080 (2006)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2009

Authors and Affiliations

  • Gonzalo Carvajal
    • 1
  • Waldo Valenzuela
    • 1
  • Miguel Figueroa
    • 1
  1. 1.Department of Electrical EngineeringUniversidad de ConcepciónChile

Personalised recommendations