Abstract
In this paper, a novel field programmable analog arrays (FPAA) architecture, namely, NueroFPAA, is introduced to utilize nanodevices to build a programmable neuromorphic system. By using nanodevices as programmable components, the proposed FPAA can achieve high-density and low-power operations for neuromorphic applications. The routing and function blocks of the FPAA are specifically designed so that this proposed architecture can support large-scale neuromorphic design as well as various analog circuitries.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Hall, T.S., Twigg, C.M., Hasler, P.: Large-scale field- programmable analog arrays for analog signal processing. IEEE Trans. Circuits and Systems-I 52(11), 2298–2307 (2005)
Gulak, P.G.: Field-programmable analog arrays: past, present and future perspectives. In: IEEE Int’l Conf. on Microelectronics and VLSI, pp. 123–126 (November 1995)
Gray, J.D., Twigg, C.M., Hasler, P.: Characteristics and programming of floating-gate pFET switches in an FPAA crossbar network. In: ISCAS 2005, vol. 1, pp. 468–471 (May 2005)
Hasler, P.E., Twigg, C.M.: An OTA-based Large-Scale Field Programmable Analog Array (FPAA) for faster On-Chip Communication and Computation. In: ISCAS 2007, pp. 177–180 (May 2007)
Tu, D., Liu, M., Wang, W., Haruehanroengra, S.: 3D CMOL: A 3D FPGA using CMOS/nanomaterial hybrid digital circuits. IEE Micro and Nano Letters 2(2), 40–45 (2007)
Türel, Ö., Lee, J.H., Ma, X., Likharev, K.K.: Nanoelectronic neuromorphic networks (crossnets): new results. In: Proc. IJCNN 2004, pp. 389–394 (2004)
Türel, Ö., Lee, J.H., Ma, X., Likharev, K.K.: Neuromorphic Architectures for Nanoelectronic Circuits. Int. J. of Circuit Theory and Applications 32, 277–302 (2004)
Lee, J.H., Likharev, K.K.: Defect-Tolerant nanoelectronic pattern classifiers. Int. J. of Circuit Theory and Applications 35, 239–264 (2007)
Gao, C., Hammerstrom, D.: Cortical Models Onto CMOL and CMOL-Architectures and Performance/Price. IEEE Trans. Circuit and System IÂ 54(11) (November 2007)
Chen, D., Wang, W., Haruehanroengra, S.: Efficient structures for CMOL circuits. IEE Micro and Nano Letters 1(2), 74–78 (2006)
Dong, C., Liu, D., Haruehanroengra, S., Wang, W.: 3D nFPGA: A reconfigurable architecture for 3D CMOS/nanomaterial hybrid digital circuits. IEEE Trans. Circuits and Systems I 54(1), 2489–2501 (2007)
Guan, W., Liu, M., Wang, W.: Nonpolar nonvolatile resistive switching in Cu doped ZrO2. IEEE Electronic Device Letters 29(5), 434–438 (2008)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2009 ICST Institute for Computer Science, Social Informatics and Telecommunications Engineering
About this paper
Cite this paper
Liu, M., Yu, H., Wang, W. (2009). FPAA Based on Integration of CMOS and Nanojunction Devices for Neuromorphic Applications. In: Cheng, M. (eds) Nano-Net. NanoNet 2008. Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering, vol 3. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-02427-6_9
Download citation
DOI: https://doi.org/10.1007/978-3-642-02427-6_9
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-02426-9
Online ISBN: 978-3-642-02427-6
eBook Packages: Computer ScienceComputer Science (R0)