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A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms

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Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 5453))

Abstract

Sequential Monte Carlo techniques are among the principal tools for the on-line estimation of the state of a non-linear dynamic system. We propose a framework for the multithreaded implementation of the widely popular sampling importance resampling (SIR) method on hybrid CPU/FPGA systems. The framework is based on the multithreaded reconfigurable operating system ReconOS which allows for an easy repartitioning of threads between hard- and software. We demonstrate the framework on a case study for visual object tracking and evaluate the performance of different hardware/software partitionings.

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References

  1. Athalye, A., Bolić, M., Hong, S., Djuric, P.M.: Generic Hardware Architectures for Sampling and Resampling in Particle Filters. EURASIP Journal on Applied Signal Processing (2005)

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  5. Hess, R.: Particle Filter Object Tracking (2006), http://web.engr.oregonstate.edu/~hess

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© 2009 Springer-Verlag Berlin Heidelberg

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Happe, M., Lübbers, E., Platzner, M. (2009). A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms. In: Becker, J., Woods, R., Athanas, P., Morgan, F. (eds) Reconfigurable Computing: Architectures, Tools and Applications. ARC 2009. Lecture Notes in Computer Science, vol 5453. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-00641-8_45

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  • DOI: https://doi.org/10.1007/978-3-642-00641-8_45

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-00640-1

  • Online ISBN: 978-3-642-00641-8

  • eBook Packages: Computer ScienceComputer Science (R0)

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