Abstract
This paper proposes a new kind of side-channel attack where the correlation between processed data and total capacitance seen looking into the power supply pin of a cryptographic device is exploited. The attack is introduced and advantages and drawbacks with respect to the well-known power analysis are discussed.
The attack implementation and experimental results attacking a static CMOS implementation of a 8051 microprocessor core are provided and a comparison between the proposed technique and power analysis is carried out. The obtained results are promising and future activities are planned to assess the performance of this new side-channel analysis when attacking secure implementations.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Kocher, P., Jaffe, J., Jun, B.: Differential power analysis. In: Wiener, M. (ed.) CRYPTO 1999. LNCS, vol. 1666, pp. 388–397. Springer, Heidelberg (1999)
Messerges, T.S., Dabbish, E.A., Sloan, R.H.: Examining Smart-Card Security under the Threat of Power Analysis Attacks. IEEE Trans. Computers 51(5), 541–552 (2002)
Agrawal, D., Archambeault, B., Rao, J.R., Rohatgi, P.: The EM side-channel(s). In: Kaliski Jr., B.S., Koç, Ç.K., Paar, C. (eds.) CHES 2002. LNCS, vol. 2523, pp. 29–45. Springer, Heidelberg (2003)
Kocher, P.: Timing Attacks on Implementations of Diffi-Hellman, RSA, DSS, and Other Systems. In: Koblitz, N. (ed.) CRYPTO 1996. LNCS, vol. 1109, pp. 104–113. Springer, Heidelberg (1996)
Biham, E., Shamir, A.: Differential fault analysis of secret key cryptosystems. In: Kaliski Jr., B.S. (ed.) CRYPTO 1997. LNCS, vol. 1294, pp. 513–525. Springer, Heidelberg (1997)
Tiri, K., Akmal, M., Verbauwhede, I.: A Dynamic and Differential CMOS Logic with Signal Independent Power Consumption to Withstand Differential Power Analysis on Smart Cards. In: Proc. IEEE 28th European Solid-State Circuit Conf. (ESSCIRC 2002) (2002)
Bucci, M., Giancane, L., Luzzi, R., Trifiletti, A.: Three-phase dual-rail pre-charge logic. In: Goubin, L., Matsui, M. (eds.) CHES 2006. LNCS, vol. 4249, pp. 232–241. Springer, Heidelberg (2006)
Mangard, S., Pramstaller, N., Oswald, E.: Successfully Attacking Masked AES Hardware Implementations. In: Rao, J.R., Sunar, B. (eds.) CHES 2005. LNCS, vol. 3659, pp. 157–171. Springer, Heidelberg (2005)
Aigner, M., Mangard, S., Menichelli, F., Menicocci, R., Olivieri, M., Popp, T., Scotti, G., Trifiletti, A.: A Side Channel Analysis Resistant Design Flow. In: Proc. IEEE Int. Symp. Circuits and Systems (ISCAS 2006), pp. 2909–2912 (2006)
Bucci, M., Giancane, L., Luzzi, R., Scotti, G., Trifiletti, A.: Enhancing Power Analysis Attacks against Cryptographic Devices. In: Proc. IEEE Int. Symp. Circuits and Systems (ISCAS 2006), pp. 2905–2908 (2006)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2009 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Bucci, M., Luzzi, R., Scotti, G., Simonetti, A., Trifiletti, A. (2009). Differential Capacitance Analysis. In: Svensson, L., Monteiro, J. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2008. Lecture Notes in Computer Science, vol 5349. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-95948-9_34
Download citation
DOI: https://doi.org/10.1007/978-3-540-95948-9_34
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-95947-2
Online ISBN: 978-3-540-95948-9
eBook Packages: Computer ScienceComputer Science (R0)