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A Parallel Architecture for Stateful, High-Speed Intrusion Detection

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Information Systems Security (ICISS 2008)

Part of the book series: Lecture Notes in Computer Science ((LNSC,volume 5352))

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Abstract

The increase in bandwidth over processing power has made stateful intrusion detection for high-speed networks more difficult, and, in certain cases, impossible. The problem of real-time stateful intrusion detection in high-speed networks cannot easily be solved by optimizing the packet matching algorithm utilized by a centralized process or by using custom-developed hardware. Instead, there is a need for a parallel approach that is able to decompose the problem into subproblems of manageable size. We present a novel parallel matching algorithm for the signature-based detection of network attacks. The algorithm is able to perform stateful signature matching and has been implemented only using off-the-shelf components. Our initial experiments confirm that, by making the rule matching process parallel, it is possible to achieve a scalable implementation of a stateful, network-based intrusion detection system.

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© 2008 Springer-Verlag Berlin Heidelberg

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Foschini, L., Thapliyal, A.V., Cavallaro, L., Kruegel, C., Vigna, G. (2008). A Parallel Architecture for Stateful, High-Speed Intrusion Detection. In: Sekar, R., Pujari, A.K. (eds) Information Systems Security. ICISS 2008. Lecture Notes in Computer Science, vol 5352. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-89862-7_18

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  • DOI: https://doi.org/10.1007/978-3-540-89862-7_18

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-89861-0

  • Online ISBN: 978-3-540-89862-7

  • eBook Packages: Computer ScienceComputer Science (R0)

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