Abstract
Evolutionary Meta Compilation (EMC) is a recent technique that enables unmodified external applications to seamlessly perform target program compilation and fitness evaluation for an Evolutionary Computation system. Grammatical Evolution (GE) is a method for evolving computer programs in an arbitrary programming language using a grammar specified in Backus-Naur Form. This paper combines these techniques to demonstrate the evolution of both sequential and combinational digital circuits in an Industry Standard Hardware Description Language (Verilog) using an external hardware synthesis engine and simulator. Overall results show the successful evolution of core digital circuit components. An extension to GE is also presented to attempt to increase the probability of maintaining an evolved program’s semantic integrity after crossover operations are performed. Early results show performance improvements in applying this technique to the majority of the presented test cases. It is suggested that this feature may also be considered for use in the evolution of software programs in C and other languages.
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© 2008 Springer-Verlag Berlin Heidelberg
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Cullen, J. (2008). Evolving Digital Circuits in an Industry Standard Hardware Description Language. In: Li, X., et al. Simulated Evolution and Learning. SEAL 2008. Lecture Notes in Computer Science, vol 5361. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-89694-4_52
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DOI: https://doi.org/10.1007/978-3-540-89694-4_52
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-89693-7
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