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Abstract

One of the most significant developments in the area of design verification over the last decade is the development of of algorithmic methods for verifying temporal specification of finite-state designs [2]. A frequent criticism against this approach, however, is that verification is done after significant resources have already been invested in the development of the design. Since designs invariably contains errors, verification simply becomes part of the debugging process. The critics argue that the desired goal ought to be the use of the specification in the design development process in order to guarantee the development of correct designs. This is called design synthesis [1,4]. In this talk I will review 50 years of research on the synthesis problem and show how the automata-theoretic approach can be used to solve it [3,4,5].

References

  1. 1.
    Church, A.: Applicaton of recursive arithmetics to the problem of circuit synthesis. In: Summaries of Talks Presented at The Summer Institute for Symbolic Logic, Communications Research Division, Institute for Defense Analysis, pp. 3–50 (1957)Google Scholar
  2. 2.
    Clarke, E.M., Grumberg, O., Peled, D.: Model Checking. MIT Press, Cambridge (1999)Google Scholar
  3. 3.
    Kupferman, O., Vardi, M.Y.: Safraless decision procedures. In: Proc. 46th IEEE Symp. on Foundations of Computer Science, pp. 531–540 (2005)Google Scholar
  4. 4.
    Pnueli, A., Rosner, R.: On the synthesis of a reactive module. In: Proc. 16th ACM Symp. on Principles of Programming Languages, pp. 179–190 (1989)Google Scholar
  5. 5.
    Rabin, M.O.: Automata on infinite objects and Church’s problem. Amer. Mathematical Society (1972)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2008

Authors and Affiliations

  • Moshe Y. Vardi
    • 1
  1. 1.Department of Computer ScienceRice UniversityHoustonU.S.A.

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