Abstract
An evolutionary algorithm is used to design digital circuits at the transistor level. In particular, various static CMOS circuits with up to four inputs were evolved. The increase in the complexity of evolved circuits wrt existing circuits evolved at the transistor level is primarily caused by two phenomena: the usage of a specialized circuit simulator and restriction of the search space. Because we restricted the search space to the set of “reasonable designs” we could employ imperfect, but very fast circuit simulation. The usage of proposed simulator allowed exploring more candidate designs than a conventional Spice-based approach. However, in some cases, an incorrect behavior was detected after validation of evolved circuits using Spice simulator.
This is a preview of subscription content, log in via an institution.
Buying options
Tax calculation will be finalised at checkout
Purchases are for personal use only
Learn about institutional subscriptionsPreview
Unable to display preview. Download preview PDF.
References
Miller, J., Job, D., Vassilev, V.: Principles in the Evolutionary Design of Digital Circuits – Part I. Genetic Programming and Evolvable Machines 1(1), 8–35 (2000)
Zebulum, R., Pacheco, M., Vellasco, M.: Evolutionary Electronics – Automatic Design of Electronic Circuits and Systems by Genetic Algorithms. The CRC Press International Series on Computational Intelligence (2002)
Higuchi, T., Liu, Y., Yao, X.: Evolvable Hardware. Springer, Heidelberg (2006)
Yao, X., Higuchi, T.: Promises and Challenges of Evolvable Hardware. IEEE Transactions on Systems, Man, and Cybernetics 29(1), 87–97 (1999)
Vassilev, V., Job, D., Miller, J.: Towards the Automatic Design of More Efficient Digital Circuits. In: Lohn, J., Stoica, A., Keymeulen, D., Colombano, S. (eds.) Proc. of the 2nd NASA/DoD Workshop on Evolvable Hardware, pp. 151–160. IEEE Computer Society Press, Los Alamitos (2000)
Chen, D., Aoki, T., Homma, N., Terasaki, T., Higuchi, T.: Graph-Based Evolutionary Design of Arithmetic Circuits. IEEE Trans. on Evolutionary Computing 6(1), 86–100 (2002)
Zhao, S., Jiao, L.: Multi-objective evolutionary design and knowledge discovery of logic circuits based on an adaptive genetic algorithm. Genetic Programming and Evolvable Machines 7(3), 195–210 (2006)
Weste, N., Harris, D.: CMOS VLSI Design: A Circuits and Systems Perspective, 3rd edn. Addison-Wesley, Reading (2004)
Quintana, J.M., Avedillo, M.J., Jiménez, R., Rodríguez-Villegas, E.: Practical low-cost cpl implementations of threshold logic functions. In: Proc. of the 11th ACM Great Lakes Symposium on VLSI 2001, pp. 139–144. ACM Press, West Lafayette (2001)
Zebulum, R., Vellasco, M., Pacheco, M.: Evolutionary design of logic gates. In: Proceedings of the workshop in Evolutionary Design, Artificial Intelligence in Design Conference, Lisbon, Portugal (1998)
Keane, A., Streeter, M.J., Mydlowec, W.: Genetic Programming IV: Routine Human-Competitive Machine Intelligence. Springer, New York (2004)
Stoica, A., Zebulum, R.S., Keymeulen, D., Ferguson, M.I., Duong, V., Guo, X.: Evolvable hardware techniques for on-chip automated reconfiguration of programmable devices. Soft Computing 8(5), 354–365 (2004)
Langeheine, J.: Intrinsic Hardware Evolution on the Transistor Level. PhD thesis, Rupertus Carola University of Heidelberg (2005)
Stoica, A., Zebulum, R., Keymeulen, D.: Mixtrinsic Evolution. In: Miller, J.F., Thompson, A., Thompson, P., Fogarty, T.C. (eds.) ICES 2000. LNCS, vol. 1801, pp. 208–217. Springer, Heidelberg (2000)
Stoica, A., Zebulum, R.S., Keymeulen, D.: Polymorphic electronics. In: Liu, Y., Tanaka, K., Iwata, M., Higuchi, T., Yasunaga, M. (eds.) ICES 2001. LNCS, vol. 2210, pp. 291–302. Springer, Heidelberg (2001)
Stoica, A., Zebulum, R., Guo, X., Keymeulen, D., Ferguson, I., Duong, V.: Taking Evolutionary Circuit Design From Experimentation to Implementation: Some Useful Techniques and a Silicon Demonstration. IEE Proc. Comp. Digit. Tech. 151(4), 295–300 (2004)
Garvie, M.: Reliable Electronics through Artificial Evolution. PhD thesis, University of Sussex (2005)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2008 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Žaloudek, L., Sekanina, L. (2008). Transistor-Level Evolution of Digital Circuits Using a Special Circuit Simulator. In: Hornby, G.S., Sekanina, L., Haddow, P.C. (eds) Evolvable Systems: From Biology to Hardware. ICES 2008. Lecture Notes in Computer Science, vol 5216. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-85857-7_28
Download citation
DOI: https://doi.org/10.1007/978-3-540-85857-7_28
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-85856-0
Online ISBN: 978-3-540-85857-7
eBook Packages: Computer ScienceComputer Science (R0)