Abstract
VLSI support vector machine classifiers require a large amount of calculations, therefore their implementation needs high density, high speed and low power circuits. In a SVM architecture based on a multiplying law the main building blocks are multipliers. We propose in this paper multiplying and weighting cells, developed by using a model consisting of a compound of two inverse non-linear functions. This procedure is suitable for VLSI implementation because it permits the use of simple nonlinearized standard DA cells that compensate each other nonlinearities to obtain an extended domain of operation. The resulted weighting/multiplying cells were analyzed and tested by simulations.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Genov, R., Chakrabartty, S., Cauwenberghs, G.: Silicon support vector machine with on-line learning. Int. J. Pattern Recognition Artificial Intell. 17(3), 385–404 (2003)
Cirlugea, M., Festila, L., Albert, F.: Considerations About Hardware Architectures of SVM Classifiers. In: Inter-Ing 2005, Targu-Mures, Romania, pp. 691–696 (2005)
Tzividis, Y.: Externally Linear, Time Invariant Systems and Their Application to Companding Signal Processing. IEEE Trans. On CS II 44(2), 65–84 (1997)
Gordan, M.: Doctoral Thesis: Applications of the Fuzy technics and the SVMs in the image processing, Technical University of Cluj-Napoca (2004) (in Romanian)
Festila, L., Groza, R., Cirlugea, M., Topa, M.: Modular Log-Domain Multipliers for SVM Classifiers. In: International Conferrence on AQTR, Cluj-Napoca, 1-4244-0360-x (2006)
Joachims, T.: SVM Light Version: 6.01, University of Dortmund, Informatik, AI-Unit (02.09.2004)
Author information
Authors and Affiliations
Editor information
Rights and permissions
Copyright information
© 2008 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Festila, L., Szolga, L.A., Cirlugea, M., Groza, R. (2008). Analog Multiplying/Weighting VLSI Cells for SVM Classifiers. In: Lovrek, I., Howlett, R.J., Jain, L.C. (eds) Knowledge-Based Intelligent Information and Engineering Systems. KES 2008. Lecture Notes in Computer Science(), vol 5179. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-85567-5_45
Download citation
DOI: https://doi.org/10.1007/978-3-540-85567-5_45
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-85566-8
Online ISBN: 978-3-540-85567-5
eBook Packages: Computer ScienceComputer Science (R0)