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Optimal Unroll Factor for Reconfigurable Architectures

  • Ozana Silvia Dragomir
  • Elena Moscu-Panainte
  • Koen Bertels
  • Stephan Wong
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4943)

Abstract

Loops are an important source of optimization. In this paper, we address such optimizations for those cases when loops contain kernels mapped on reconfigurable fabric. We assume the Molen machine organization and Molen programming paradigm as our framework. The proposed algorithm computes the optimal unroll factor u for a loop that contains a hardware kernel K such that u instances of K run in parallel on the reconfigurable hardware, and the targeted balance between performance and resource usage is achieved. The parameters of the algorithm consist of profiling information about the execution times for running K in both hardware and software, the memory transfers and the utilized area. In the experimental part, we illustrate this method by applying it to a loop nest from a real-life application (MPEG2), containing the DCT kernel.

Keywords

Execution Time Memory Access Shared Memory Loop Nest Multiple Kernel 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2008

Authors and Affiliations

  • Ozana Silvia Dragomir
    • 1
  • Elena Moscu-Panainte
    • 1
  • Koen Bertels
    • 1
  • Stephan Wong
    • 1
  1. 1.Computer Engineering, EEMCSDelft University of TechnologyDelftThe Netherlands

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