Abstract
We present an improved method for scheduling speculative data paths which relies on cancel tokens to undo computations in mis-speculated paths. Performancewise, this method is considerably faster than lenient execution, and faster than any other known approach applicable for general (including non-pipelined) computation structures. We present experimental evidence obtained by implementing our method as part of the high-level language hardware/software compiler COMRADE.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Callahan, T., Hauser, J., Wawrzynek, J.: The Garp architecture and C Compiler. IEEE Computer 33(4), 62–69 (2000)
MacMillen, D.: Nimble Compiler Environment for Agile Hardware. Storming Media LLC, USA (2001)
Budiu, M.: Spatial Computation. Ph.D. Thesis, Computer Science Department, Carnegie Mellon University, Pittsburgh, PA, USA (December 2003)
Gupta, S., et al.: SPARK: A High-Level Synthesis Framework for Applying Parallelizing Compiler Transformations. In: Intl. Conf. on VLSI Design (VLSI), New Delhi, India (January 2003)
Guo, Z., Buyukkurt, B., Najjar, W., Vissers, K.: Optimized Generation of Data-path from C Codes for FPGAs. In: Intl. Conf. on Design, Automation, and Test in Europe (DATE), Munich, Germany (March 2005)
Mishra, M., Callahan, T., Chelcea, T., Venkataramani, G., Budiu, M., Goldstein, S.: Tartan: Evaluating Spatial Computation for Whole Program Execution. In: Intl. Conf. on Architectural Support for Programming Languages and Operating Systems (ASPLOS), San Jose, California, USA (October 2006)
Koch, A., Kasprzyk, N.: High-Level-Language Compilation for Reconfigurable Computers. In: Intl. Conf. on Reconfigurable Communication-centric SoCs (ReCoSoC), Montpellier, France (June 2005)
Gädke, H., Koch, A.: COMRADE: A Compiler for Adaptive Computing Systems Using a Novel Fast Speculation Technique. In: Intl. Conf. on Field Programmable Logic and Applications (FPL), Amsterdam, Netherlands (August 2007)
Kountouris, A., Wolinski, C.: Efficient Scheduling of Conditional Behaviors for High-Level Synthesis. ACM Transactions on Design Automation of Electronic Systems (TODAES) 7(3), 380–412 (2002)
Gong, W., Wang, G., Kastner, R.: A High Performance Application Representation for Reconfigurable Systems. In: Intl. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), Las Vegas, NEV, USA (June 2004)
Mencer, O., Hubert, H., Morf, M., Flynn, M.: StReAm: Object-Oriented Programming of Stream Architectures using PAM-Blox. In: IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), Napa Valley, CA, USA (April 2000)
Styles, H., Luk, W.: Pipelining Designs with Loop-Carried Dependencies. In: IEEE Intl. Conf. on Field-Programmable Technology (FPT), Brisbane, Australia (December 2004)
Brej, C., Garside, J.: Early Output Logic using Anti-Tokens. In: Intl. Workshop on Logic Synthesis (IWLS), Laguna Beach, CA, USA (March 2003)
Ampalam, M., Singh, M.: Counterflow Pipelining: Architectural Support for Preemption in Asynchronous Systems using Anti-Tokens. In: Intl. Conf. on Computer Aided Design (ICCAD), San Jose, CA, USA (November 2006)
Kasprzyk, N.: COMRADE - Ein Hochsprachen-Compiler für Adaptive Computersysteme. Ph.D. Thesis, Integrated Circuit Design (E.I.S.), Tech. Univ. Braunschweig, Germany (June 2005)
Ferrante, J.: The Program Dependence Graph and Its Use in Optimization. ACM Transactions on Programming Languages and Systems (TOPLAS) 9(3), 319–349 (1987)
Campbell, P., Krishna, K., Ballance, R.: Refining and Defining the Program Dependence Web. Technical Report TR 93-6, Department of Computer Science, University of New Mexico, Albuquerque, NM, USA (March 1993)
Koch, A.: Advances in Adaptive Computer Technology. Habilitation, Integrated Circuit Design (E.I.S.), Tech. Univ. Braunschweig, Germany (December 2004)
Neumann, T., Koch, A.: A Generic Library for Adaptive Computing Environments. In: Intl. Conf. on Field-Programmable Logic and Applications (FPL), Belfast, Northern Ireland, UK (2001)
Lange, H., Koch, A.: An Execution Model for Hardware/Software Compilation and its System-Level Realization. In: Intl. Conf. on Field-Programmable Logic and Applications (FPL), Amsterdam, Netherlands (August 2007)
Lange, H., Koch, A.: Memory Access Schemes for Configurable Processors. In: Intl. Conf. on Field-Programmable Logic and Applications (FPL), Villach, Austria (August 2000)
Author information
Authors and Affiliations
Editor information
Rights and permissions
Copyright information
© 2008 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Gädke, H., Koch, A. (2008). Accelerating Speculative Execution in High-Level Synthesis with Cancel Tokens. In: Woods, R., Compton, K., Bouganis, C., Diniz, P.C. (eds) Reconfigurable Computing: Architectures, Tools and Applications. ARC 2008. Lecture Notes in Computer Science, vol 4943. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-78610-8_19
Download citation
DOI: https://doi.org/10.1007/978-3-540-78610-8_19
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-78609-2
Online ISBN: 978-3-540-78610-8
eBook Packages: Computer ScienceComputer Science (R0)