Run-Time Adaptable Architectures for Heterogeneous Behavior Embedded Systems

  • Antonio Carlos S. Beck
  • Mateus B. Rutzig
  • Georgi Gaydadjiev
  • Luigi Carro
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4943)


As embedded applications are getting more complex, they are also demanding highly diverse computational capabilities. The majority of all previously proposed reconfigurable architectures targets static data stream oriented applications, optimizing very specific computational kernels, corresponding to the typical embedded systems characteristics in the past. Modern embedded devices, however, impose totally new requirements. They are expected to support a wide variety of programs on a single platform. Besides getting more heterogeneous, these applications have very distinct behaviors. In this paper we explore this trend in more detail. First, we present a study about the behavioral difference of embedded applications based on the Mibench benchmark suite. Thereafter, we analyze the potential optimizations and constraints for two different run-time dynamic reconfigurable architectures with distinct programmability strategies: a fine-grain FPGA based accelerator and a coarse-grain array composed by ordinary functional units. Finally, we demonstrate that reconfigurable systems that are focused to single data stream behavior may not suffice anymore.


Embed System Basic Block Embed Application Reconfigurable System Reconfigurable Hardware 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.


  1. 1.
    Wilcox, K., Manne, S.: Alpha processors: A history of power issues and a look to the future. In: CoolChips Tutorial An Industrial Perspective on Low Power Processor Design in conjunction with Micro, vol. 33 (1999)Google Scholar
  2. 2.
    Stitt, G., Vahid, F.: The Energy Advantages of Microprocessor Platforms with On-Chip Configurable Logic. IEEE Design and Test of Computers (2002)Google Scholar
  3. 3.
    Compton, K., Hauck, S.: Reconfigurable computing: A survey of systems and software. ACM Computing Surveys 34(2), 171–210 (2002)CrossRefGoogle Scholar
  4. 4.
    Hauck, S., Fry, T., Hosler, M., Kao, J.: The Chimaera reconfigurable functional unit. In: Proc. IEEE Symp. FPGAs for Custom Computing Machines, Napa Valley, CA, pp. 87–96 (1997)Google Scholar
  5. 5.
    Hauser, J.R., Wawrzynek, J.: Garp: a MIPS processor with a reconfigurable coprocessor. In: Proc. 1997 IEEE Symp. Field Programmable Custom Computing Machines, pp. 12–21 (1997)Google Scholar
  6. 6.
    Sankaralingam, k., Nagarajan, R., Liu, H., Kim, C., Huh, J., Burger, D., Keckler, S.W., Moore, C.R.: Exploiting ILP, TLP and DLP with the Polymorphous TRIPS Architecture. In: Proc. of the 30th Int. Symp. on Computer Architecture, pp. 422–433 (June 2003)Google Scholar
  7. 7.
    Swanson, S., Michelson, K., Schwerin, A., Oskin, M.: WaveScalar. In: MICRO-36 (December 2003) Google Scholar
  8. 8.
    Goldstein, S.C., Schmit, H., Budiu, M., Cadambi, S., Moe, M., Taylor, R.R.: PipeRench: A Reconfigurable Architecture and Compiler. IEEE Computer, 70–77 (April 2000)Google Scholar
  9. 9.
    Lysecky, R., Stitt, G., Vahid, F.: Warp Processors. ACM Transactions on Design Automation of Electronic Systems (TODAES), 659–681 (July 2006)Google Scholar
  10. 10.
    Clark, N., Kudlur, M., Park, H., Mahlke, S., Flautner, K.: Application-Specific Processing on a General-Purpose Core via Transparent Instruction Set Customization. In: International Symposium on Microarchitecture (MICRO-37), pp. 30–40 (December 2004)Google Scholar
  11. 11.
    Beck, A.C.S., Rutzig, M.B., Gaydadjiev, G.N., Carro, L.: Transparent Reconfigurable Acceleration for Heterogeneous Embedded Applications. In: Design, Automation and Test in Europe (DATE), Munique (March 2008)Google Scholar
  12. 12.
    Vassiliadis, S., Cotofana, S.D., Wong, S.: The MOLEN ρμ-Coded Processor. In: Brebner, G., Woods, R. (eds.) FPL 2001. LNCS, vol. 2147, pp. 275–285. Springer, Heidelberg (2001)CrossRefGoogle Scholar
  13. 13.
    Guthaus, M.R., Ringenberg, J.S., Ernst, D., Austin, T.M., Mudge, T., Brown, R.B.: MiBench: A Free, Commercially Representative Embedded Benchmark Suite. In: 4th Workshop on Workload Characterization, Austin, TX (December 2001)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2008

Authors and Affiliations

  • Antonio Carlos S. Beck
    • 1
  • Mateus B. Rutzig
    • 1
  • Georgi Gaydadjiev
    • 2
  • Luigi Carro
    • 1
  1. 1.Universidade Federal do Rio Grande do SulPorto AlegreBrazil
  2. 2.Computer EngineeringDelft University of TechnologyDelftThe Netherlands

Personalised recommendations