Abstract
Hardware Transactional Memory (HTM) gives software developers the opportunity to write parallel programs more easily compared to any previous programming method, and yields better performance than most previous lock-based synchronizations.
Current implementations of HTM perform very well with small transactions. But when a transaction overflows the cache, these implementations either abort the transaction as unsuitable for HTM, and let software takeover, or revert to some much more inefficient hash-like in-memory structure, usually located in the userspace.
We present a fast, scalable solution that has virtually no limit on transaction size, has low transactional read and write overhead, works with physical addresses, and doesn’t require any changes inside the cache subsystem.
This paper presents an HTMOS - Operating System (OS) and Architecture modifications that leverage the existing OS Virtual Memory mechanisms, to support unbounded transaction sizes, and provide transaction execution speed that does not decrease when transaction grows.
Chapter PDF
References
Bobba, J., Moore, K.E., Volos, H., Yen, L., Hill, M.D., Swift, M.M., Wood, D.A.: Performance pathologies in hardware transactional memory. In: ISCA, pp. 81–91 (2007)
Chuang, W., Narayanasamy, S., Venkatesh, G., Sampson, J., Biesbrouck, M.V., Pokam, G., Calder, B., Colavin, O.: Unbounded page-based transactional memory. SIGARCH Comput. Archit. News 34(5), 347–358 (2006)
Hammond, L., Carlstrom, B.D., Wong, V., Hertzberg, B., Chen, M., Kozyrakis, C., Olukotun, K.: Programming with transactional coherence and consistency (tcc). In: ASPLOS-XI: Proceedings of the 11th international conference on Architectural support for programming languages and operating systems, pp. 1–13. ACM Press, New York (2004)
McDonald, A., Chung, J., Chafi, H., Cao Minh, C., Carlstrom, B.D., Hammond, L., Kozyrakis, C., Olukotun, K.: Characterization of tcc on chip-multiprocessors. In: Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques (September 2005)
Moore, K.E., Bobba, J., Moravan, M.J., Hill, M.D., Wood, D.A.: Logtm: Log-based transactional memory. In: Proceedings of the 12th International Symposium on High-Performance Computer Architecture, pp. 254–265 (February 2006)
Author information
Authors and Affiliations
Editor information
Rights and permissions
Copyright information
© 2008 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Tomic, S., Cristal, A., Unsal, O., Valero, M. (2008). Hardware Transactional Memory with Operating System Support, HTMOS. In: Bougé, L., et al. Euro-Par 2007 Workshops: Parallel Processing. Euro-Par 2007. Lecture Notes in Computer Science, vol 4854. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-78474-6_4
Download citation
DOI: https://doi.org/10.1007/978-3-540-78474-6_4
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-78472-2
Online ISBN: 978-3-540-78474-6
eBook Packages: Computer ScienceComputer Science (R0)