Skip to main content

An Optimal Design Method for De-synchronous Circuit Based on Control Graph

  • Conference paper
Book cover Advanced Parallel Processing Technologies (APPT 2007)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 4847))

Included in the following conference series:

  • 891 Accesses

Abstract

De-synchronous is a very useful method to design asynchronous circuit automatically from synchronous description of circuits. This paper introduces an optimal design method based on Control Graph which is an abstract model of the de-synchronous circuit. The main purpose of this optimal design method is to reduce the extra overhead in the area of the de-synchronous circuit. The optimization algorithm takes the performance evaluation function based on the Control Graph of the de-synchronous circuit as its heuristic function. The performance evaluation function presented in this paper is a linear programming problem. In the end of this paper, the optimal method is applied to a set of benchmark circuits. The number of the local controllers in these circuits is markedly reduced by 54%, and the number of C-elements that is required to construct the handshake circuitry between local controllers is also reduced by 76.3%. So the entire area of the circuit is sharply reduced. Because this design method is directed by the performance evaluation function of the circuit, there is no penalty in performance of the de-synchronous circuit.

Supported by the National Natural Science Foundation of China under Grant No. 90407022.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 84.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 109.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. Cortadella, J., Kondratyev, A., Lavagno, L., Sotiriou, C.: A concurrent model for desynchronization. In: IWLS 2003 (2003)

    Google Scholar 

  2. Sutherland, I.E.: Micropipelines. Communications of the ACM 32 (1989)

    Google Scholar 

  3. Furber, S.B., Garside, J.D., Gilbert, D.A.: Amulet3: A high-performance self-timed arm microprocessor. In: Proc. International Conf. Computer Design(ICCD) (October 1998)

    Google Scholar 

  4. Bardsley, A., Edwards, D.: Coompiling the language Balsa to delay-insensitive hardware (1997)

    Google Scholar 

  5. van Berkel, K.: Handshake Circuits: an Asynchronous Architecture for VLSI Programming. Cambridge University Press, Cambridge (2001)

    Google Scholar 

  6. Blunno, I., Lavagno, L.: Automated synthesis of micro-pipelines from behavioral verilog hdl. In: Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems, pp. 84–92. IEEE Computer Society Press, Los Alamitos (2000)

    Google Scholar 

  7. Ligthart, M., Fant, K., Smith, R., Taubin, A., Kondratyev, A.: Asynchronous dsign using commercial hdl synthesis tools. In: Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems, pp. 114–125. IEEE Computer Society Press, Los Alamitos (2000)

    Google Scholar 

  8. Linder, D.H., Harden, J.C.: Phased logic: Supporting the synchronous design paradigm with delay-insensitive circuitry. IEEE Transactions on Computers 45, 1031–1044 (1996)

    Article  MATH  Google Scholar 

  9. Davare, A., Lwin, K., Kondratyev, A., Sangiovanni-Vincentelli, A.: The best of both worlds: The efficient asynchronous implementation of synchronous specifications. In: Design Automation Conference (DAC), ACM/IEEE (June 2004)

    Google Scholar 

  10. Yong, L., Lei, W., Rui, G., Kui, D., Zhi-ying, W.: Research and implementation of a 32-bits asynchronous multiplier. Journal of Computer Research and Development 43 (November 2006)

    Google Scholar 

  11. Gong, R., Wang, L., Li, Y., Dai, K.: A de-synchronous circuit design flow using hybrid cell library. In: ICSICT 2006. Proc. of 8th International Conference on Solid-State and Integrated-Circuit Technology, Madrid, Spain, pp. 149–158. IEEE Computer Society Press, Los Alamitos (2004)

    Google Scholar 

  12. Blunno, I., Cortadella, J., Kondratyev, A., Lavagno, L., Lwin, K., Sotiriou, C.: Handshake protocols for de-synchronization. In: Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems, Shanghai, China

    Google Scholar 

  13. Wang, L., Zhi-ying, W., Dai, K.: Cycle period analysis and optimization of asynchronous timed circuits. In: Jesshope, C., Egan, C. (eds.) ACSAC 2006. LNCS, vol. 4186, pp. 502–508. Springer, Heidelberg (2006)

    Chapter  Google Scholar 

  14. Wang, L.: Design and Anslysis Techniques of Asynchronous Embedded Microprocessors. Ph.d. thesis, National University of Defence technology, Changsha (September 2006)

    Google Scholar 

  15. Murata, T.: Petri nets: Properties, analysis and applications. Proceedings of the IEEE, 541–580 (April 1989)

    Google Scholar 

  16. Karmarkar, N.: A new polynomial-time algorithm for linear programming. In: Proceedings of the 16th Annual ACM Symposium on Theory of Computing, pp. 302–311 (April 1984)

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Ming Xu Yinwei Zhan Jiannong Cao Yijun Liu

Rights and permissions

Reprints and permissions

Copyright information

© 2007 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Jin, G., Wang, L., Wang, Z., Dai, K. (2007). An Optimal Design Method for De-synchronous Circuit Based on Control Graph . In: Xu, M., Zhan, Y., Cao, J., Liu, Y. (eds) Advanced Parallel Processing Technologies. APPT 2007. Lecture Notes in Computer Science, vol 4847. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-76837-1_11

Download citation

  • DOI: https://doi.org/10.1007/978-3-540-76837-1_11

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-76836-4

  • Online ISBN: 978-3-540-76837-1

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics