Advertisement

A Sophisticated Architecture for Evolutionary Multiobjective Optimization Utilizing High Performance DSP

  • Quanxi Li
  • Jingsong He
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4684)

Abstract

Constructing an evolutionary engine platform in evolvable hardware (EHW) is one of the most important topics, and a sophisticated architecture for the application of adaptive hardware is the key for the platform. In real world, most applications are multi-objective, and it is much necessary to solve the multi-objective problems (MOPs) by implementing evolutionary multi-objective optimization (EMO) in a special hardware platform. At present, there are far fewer attempts concerned with the theme. In this paper, we present an adaptive hardware platform to implement EMO algorithms utilizing high-performance digital signal processor (DSP) device. In this design, we mainly solve the problem of speedup in execution of evolutionary search by using parallel construct to implement such an EMO algorithm on DSP. Experimental results show that our platform works quite well. We still get a speedup of nearly 100 times in the condition that the CPU host frequency is 1810MHz and the hardware clock frequency is 150MHz, which offers an idea that by using a higher frequency DSP, we will get a better speedup, and we may further solve the real-world MOPs in real time.

Keywords

Evolutionary Multi-objective Optimization Digital Signal Processor Evolvable Hardware 

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    Garis, D.H.: CAM-BRAIN: Growing an Artificial Brain with a Million Neural Net Modules Inside a Trillion Cell Cellular Automata Machine. Journal of the Society of Instrument and Control Engineers 33(2) (1994)Google Scholar
  2. 2.
    Zebulum, R.S., Pacheco, M.A., Vellasco, M.: Evolvable Systems in Hardware Design: Taxonomy, Survey and Applications. In: Proceedings of the First International Conference on Evolvable Systems: From Biology to Hardware, pp. 344–358 (1996)Google Scholar
  3. 3.
    Tufte, G., Haddow, P.C.: Prototyping a GA Pipeline for complete hardware evolution. In: Proceedings of the First NASA/DoD Conference Workshop on Evolvable Hardware, pp. 18–25 (1999)Google Scholar
  4. 4.
    Hemmi, H., Shimohara, K.: Development and Evolution of Hardware Behaviors. In: Sanchez, E., Tomassini, M. (eds.) Towards Evolvable Hardware. LNCS, vol. 1062, pp. 250–265. Springer, Heidelberg (1996)Google Scholar
  5. 5.
    Gwaltney, D.A., Ferguson, M.I.: Intrinsic Hardware Evolution for the Design and Reconfiguration of Analog Speed Controllers for a DC Motor. In: Proceedings of the 2003 NASA/DoD Conference Workshop on Evolvable Hardware, pp. 81–90 (2003)Google Scholar
  6. 6.
    Stoica, A., Keymeulen, D., Zebulum, R., Thakoor, A., Daud, T., Klimeck, G., Jin, Y., Tawel, R., Duong, V.: Evolution of Analog Circuits on Field Programmable Transistor Arrays. In: Proceedings of the Second NASA/DoD Conference Workshop on Evolvable Hardware, pp. 99–108 (2000)Google Scholar
  7. 7.
    Jo, G.D., Sheen, M.J., Lee, S.H., Cho, K.R.: A DSP-Based Reconfigurable SDR Platform for 3G Systems. IEICE Transactions on Communications 88(2), 678–686 (2005)CrossRefGoogle Scholar
  8. 8.
    Murakawa, M., Yoshizawa, S., Kajitani, I., Yao, X., Kajihara, N., Iwata, M., Higuchi, T.: The GRD Chip: Genetic Reconfiguration of DSPs for Neural Network Processing. IEEE Transactions on Computers 48(6), 628–639 (1999)CrossRefGoogle Scholar
  9. 9.
    Ferguson, M.I., Stoica, A., Keymeulen, D., Zebulum, R., Duong, V.: An evolvable hardware platform based on DSP and FPTA. In: Proceedings of Genetic and Evolutionary Computation Conference, pp. 145–152 (2002)Google Scholar
  10. 10.
    Deb, K., Pratap, A., Agarwal, S., Meyarivan, T.: A fast and elitist multiobjective genetic algorithm: NSGA-II. IEEE Transactions on Evolutionary Computation 6(2), 182–197 (2002)CrossRefGoogle Scholar
  11. 11.
    Texas Instruments: TMS320C6000 CPU and Instruction Set Reference Guide. Literature Number: SPRU189F (2000)Google Scholar
  12. 12.
    Texas Instruments: TMS320C621x/C671x DSP Two-Level Internal Memory Reference Guide. Literature Number: SPRU609A (2003)Google Scholar
  13. 13.
    Texas Instruments: TMS320C6000 Programmer’s Guide. Literature Number: SPRU198G (2002)Google Scholar
  14. 14.
    Coddington, P.D.: Random Number Generators for Parallel Computers. NHSE Review 1(2) (1997)Google Scholar
  15. 15.
    Zitzler, E., Deb, K., Thiele, L.: Comparison of Multiobjective Evolutionary Algorithms: Empirical Results. Evolutionary Computation 8(2), 173–195 (2000)CrossRefGoogle Scholar
  16. 16.
    Deb, K., Agrawal, R.B.: Simulated Binary Crossover for Continuous Search Space. Complex Systems 9(2), 115–148 (1995)zbMATHMathSciNetGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2007

Authors and Affiliations

  • Quanxi Li
    • 1
  • Jingsong He
    • 2
  1. 1.Department of Electronic Science and Technology 
  2. 2.Nature Inspired Computation and Applications Laboratory, University of Science and Technology of China, Hefei, 230026China

Personalised recommendations