Advertisement

Topic 4 High-Performance Architectures and Compilers

  • Michael O’Boyle
  • François Bodin
  • Jose Gonzalez
  • Lucian Vintan
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4641)

Abstract

Parallelism is now a central concern for architecture designers and compiler writers. Instruction-level parallelism and increasingly multi-cores are present in all contemporary processors. Furthermore, we are witnessing a convergence of interests with architects and compiler writers addressing large scale parallel machines, general-purpose platforms and specialised hardware designs such as graphic coprocessors or low-power embedded systems. Modern systems require system software and hardware to be designed in tandem, hence this topic is concerned with architecture design and compilation. Twenty-four papers were submitted to the track of which five were accepted split over two sessions.

Keywords

Hyperspectral Image Transactional Memory Chip Multiprocessor Transactional Memory System Data Compression Technique 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Copyright information

© Springer-Verlag Berlin Heidelberg 2007

Authors and Affiliations

  • Michael O’Boyle
  • François Bodin
  • Jose Gonzalez
  • Lucian Vintan

There are no affiliations available

Personalised recommendations