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A SWP Specification for Sequential Image Processing Algorithms

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Advances in Computer Systems Architecture (ACSAC 2007)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 4697))

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Abstract

To retarget sequential image processing algorithm written in sequential languages (e.g. C) to processors with multimedia extensions and multimedia-specific embedded microprocessors is an open issue. Image processing algorithms are inherently with sub-word parallelism (SWP) But current compilers are not able to exploit it by locating SWP within a basic block. This paper proposes a program representation and pattern-matching approach for generating an explicit SWP specification from sequential source code. The representation is based on an extension of the multidimensional synchronous dataflow (MDSDF) model of computation. For both the compiler and source programs should not be user-modified, we extend compiler’s functionality by adding a specialized pattern-library. After data-flow and control-flow analysis with pattern matching, the generated SWFG (Sub-Word Flow Graph) can be used as an intermediate representation for the next step of compiler for SWP instruction selection and code generation.

Sponsored by National Natural Science Foundation of China under Grant NO.60173040.

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Lynn Choi Yunheung Paek Sangyeun Cho

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© 2007 Springer-Verlag Berlin Heidelberg

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Tang, W., Wang, S., Wu, D., Kuang, W. (2007). A SWP Specification for Sequential Image Processing Algorithms. In: Choi, L., Paek, Y., Cho, S. (eds) Advances in Computer Systems Architecture. ACSAC 2007. Lecture Notes in Computer Science, vol 4697. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-74309-5_24

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  • DOI: https://doi.org/10.1007/978-3-540-74309-5_24

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-74308-8

  • Online ISBN: 978-3-540-74309-5

  • eBook Packages: Computer ScienceComputer Science (R0)

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