In this chapter, a software-based methodology to automatically generate test programs is described. The methodology is based on an evolutionary algorithm able to generate test programs for microprocessor cores, and may be used for different processors since their instruction set architecture is described appropriately, and because a feedback can be defined, computed, and used to drive the test program generation process. The usefulness of the methodology is backed up by the presentation of three different cases of study: the first one tackles the verification of the DLX/pII processor; the second one generates post-silicon verification programs for the Pentium 4; and the third one evolves a test set for the PLASMA processor. The gathered experimental results demonstrate the algorithm versatility and efficiency.
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Sanchez, E., Squillero, G. (2007). Evolutionary Techniques Applied to Hardware Optimization Problems: Test and Verification of Advanced Processors. In: Jain, L.C., Palade, V., Srinivasan, D. (eds) Advances in Evolutionary Computing for System Design. Studies in Computational Intelligence, vol 66. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-72377-6_13
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