Abstract
Cryptographic substitution boxes (S-boxes) are an integral part of the Advanced Encryption Standard (AES). In this paper we conducted a simulation-based correlation power analysis (CPA) attack on AES imple- mentations with different S-box structures. It shows that the abilities of AES and S-boxes to secure against CPA attack are correlated, and an evaluation of the ability of S-boxes to thwart CPA is presented in a quantitative way. By further exploiting the properties of S-boxes, an approximate linear relation between abilities of S-boxes to resist CPA and glitch power ratios of total power consumed by S-boxes is proved.
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References
Advanced Encryption Standard (AES). Federal Information Processing Standards Publication 197 (Nov. 2001)
Tiri, K., Akmal, M., Verbauwhede, I.: A Dynamic and Differential CMOS Logic with Signal Independent Power Consumption to Withstand Differential Power Analysis on Smart Cards. In: Proc. of 28th European Solid-State Circuits Conference, pp. 403–406 (2002)
Tiri, K., et al.: A side-channel leakage free coprocessor IC in 0.18um CMOS for embedded AES-based cryptographic and biometric processing. In: Proc. ACM/IEEE Design Automation Conference (DAC 2005), pp. 222–227 (2005)
Suzuki, D., Saeki, M., Ichikawa, T.: Random Switching Logic: A Countermeasure against DPA based on Transition Probability. Cryptology ePrint Archive, Report 2004/346 (2004)
Shang, D., et al.: High-security asynchronous circuit implementation of AES. IEE Proceedings Computers and Digital Techniques 153(2), 71–77 (2006)
Golic, J., Tymen, C.: Multiplicative Masking and Power Analysis of AES. In: Kaliski Jr., B.S., Koç, Ç.K., Paar, C. (eds.) CHES 2002. LNCS, vol. 2523, pp. 198–212. Springer, Heidelberg (2003)
Brier, E., Clavier, C., Olivier, F.: Correlation Power Analysis with a Leakage Model. In: Joye, M., Quisquater, J.-J. (eds.) CHES 2004. LNCS, vol. 3156, pp. 16–29. Springer, Heidelberg (2004)
Guilley, S., Hoogvorst, P., Pacalet, R.: Differential Power Analysis Model and some Results. In: Proceedings of CARDIS 2004, pp. 127–142. Kluwer Academic Publishers, Dordrecht (2004)
Wolkerstorfer, J., Oswald, E., Lamberger, M.: An ASIC Implementation of the AES S-boxes. In: Preneel, B. (ed.) CT-RSA 2002. LNCS, vol. 2271, pp. 67–78. Springer, Heidelberg (2002)
Morioka, S., Satoh, A.: An optimized S-box circuit architecture for low power AES design. In: Kaliski Jr., B.S., Koç, Ç.K., Paar, C. (eds.) CHES 2002. LNCS, vol. 2523, pp. 172–186. Springer, Heidelberg (2003)
Bertoni, G., et al.: Power-efficient ASIC Synthesis of Cryptographic Sboxes. In: GLSVLSI 2004, pp. 277–281. ACM Press, New York (2004)
Morioka, S., Satoh, A.: An optimized S-box circuit architecture for low power AES design. In: Kaliski Jr., B.S., Koç, Ç.K., Paar, C. (eds.) CHES 2002. LNCS, vol. 2523, pp. 172–186. Springer, Heidelberg (2003)
Mangard, S.: Hardware Countermeasures against DPA - A Statistical Analysis of Their Effectiveness. In: Okamoto, T. (ed.) CT-RSA 2004. LNCS, vol. 2964, pp. 222–235. Springer, Heidelberg (2004)
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Liu, Zl., Guo, X., Chen, Yc., Han, Y., Zou, Xc. (2007). On the Ability of AES S-Boxes to Secure Against Correlation Power Analysis. In: Dawson, E., Wong, D.S. (eds) Information Security Practice and Experience. ISPEC 2007. Lecture Notes in Computer Science, vol 4464. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-72163-5_5
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DOI: https://doi.org/10.1007/978-3-540-72163-5_5
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