Introduction

Abstract

Design of modern discrete devices and systems often deals with parallel processes and structures. For that reason practically all modern hardware design languages and formalisms used for system specification (such as VHDL, Verilog) allow describing concurrency. Design of complex, VLSI-based electronic devices is possible only with the help of CAD systems, so the design and verification methods have to be (and mostly are) formalized. Formalization and automatization of system design requires developing of formal models for parallel discrete systems and low-level description languages based on these models.