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Parametric Architecture for Function Calculation Improvement

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Book cover Architecture of Computing Systems - ARCS 2007 (ARCS 2007)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 4415))

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Abstract

This paper presents a new approach to the problem caused by the exploding needs of computing resources in function calculation. The proposal argues for increasing the computing power at the primitive processing level in order to reduce the number of computing levels required to carry out the calculations. This trade-off is developed within the limits of function evaluation by substituting the usual primitives, namely sum and multiplication, by a unique weighted primitive that can be tuned for different values of the weighting parameters. All function points are carried out by successive iterations of the primitive. A parametric architecture implements the design. The case of combined trigonometric functions involved in the calculation of the Hough transform (HT) is analyzed under this scope. It provides memory and hardware resource saving as well as speed improvements, according to the experiments carried out with the HT.

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References

  1. Schwarz, E.M.: Rounding for Quadratically Converging Algorithm for Division and Square Root. In: Proc. ASILOMAR’96, pp. 600–603 (1996)

    Google Scholar 

  2. Beaumont-Smith, A., Burgess, N., Lefrere, S.: Reduced Latency IEEE Floating- point Standard Adder Architectures. In: Proc. ARITH’99, pp. 35–43 (1999)

    Google Scholar 

  3. Schmookler, M.S., Nowka, K.J.: Leading zero anticipation and detection-a comparison of methods. In: Proc. ARITH’01, pp. 7–12 (2001)

    Google Scholar 

  4. Lang, T., Bruguera, J.D.: Floating-Point Multiply-Add-Fused with Reduced Latency. IEEE Trans. on Computers 53(8), 988–1003 (2004)

    Article  Google Scholar 

  5. Tan, D., Danysh, A., Liebelt, M.: Multiple-precision fixed-point vector multiply-accumulator using shared segmentation. In: Proc. ARITH’03, pp. 12–19 (2003)

    Google Scholar 

  6. Muamar, H.K., Nixon, M.: Tristage HT for multiple ellipse extraction. IEEE Proc. Part E: Computer and Digital Techniques 138(1), 27–35 (1991)

    Google Scholar 

  7. Haule, D.D., Malowany, A.S.: Object Recognition using fast adaptive HT. In: Proc PACRIM’89, pp. 91–94 (1989)

    Google Scholar 

  8. Silva, I.: Vectorization from aerial photographs applying the HT method. Proc. SPIE 1395(2), 956–963 (1990)

    Google Scholar 

  9. Yamazawa, K., Yagi, Y., Yachida, M.: 3d Line Segment Reconstruction by Using Hyperomni Vision and Omnidirectional Hough Transforming. In: Proc. ICPR’00, vol. 3, pp. 487–490 (2000)

    Google Scholar 

  10. Bariani, M., Cucchiara, R., Mello, P., Piccardi, M.: Exploiting symbolic learning in visual inspection. In: Liu, X., Cohen, P.R., Berthold, M.R. (eds.) Advances in Intelligent Data Analysis. Reasoning about Data. LNCS, vol. 1280, pp. 223–234. Springer, Heidelberg (1997)

    Google Scholar 

  11. Dong, F., Clapworthy, G.J., Krokos, M.: Volume Rendering of Fine Details Within Medical Data. In: Proc. VIS’01, pp. 387–394 (2001)

    Google Scholar 

  12. Tezmol, A., Sari-Sarraf, H., Mitra, S., Gururajan, A.: Customized HT for Robust Segmentation of Cervical Vertebrae from X-Ray Images. In: Proc. SSIAI’02, pp. 224–228 (2002)

    Google Scholar 

  13. Huang, L.Y., Hu, Z., Sun, F.M.: A New Automatic Quasar Recognition Technique Based on PCA and the HT. In: Proc. ICPR’00, pp. 2499–2502 (2000)

    Google Scholar 

  14. Sural, S., Das, P.K.: A genetic algorithm for feature selection in a neuro-fuzzy OCR system. In: Proc. ICEDAR’6, pp. 987–991 (2001)

    Google Scholar 

  15. Koshimizu, H., Numada, M.: On fast HT method PLHT based on piecewise-linear Hough function. J. System Computer in Japan 21(5), 62–73 (1990)

    Article  Google Scholar 

  16. Ben-Tzvi, D., Sandler, M.: A Combinatorial HT. J.P. Recognition Letters 11, 167–174 (1990)

    Article  MATH  Google Scholar 

  17. da Fontura, L., Sandler, M.B.: A binary HT and its efficient implementation in a systolic array architecture. J.P. Recognition Letters 10, 329–334 (1989)

    Article  Google Scholar 

  18. Walther, J.S.: A unified algorithm for elementary functions. In: Proc. Spring Joint Computers Conf., pp. 379–385 (1971)

    Google Scholar 

  19. Li, H.F., Lavin, M.A., Le Master, R.J.: Fast HT: a hierarchical approach. J. Computer Vision Graphics Image Processing 36, 139–161 (1986)

    Article  Google Scholar 

  20. Hu, Y.H.: CORDIC-based VLSI architectures for Digital Signal Processing. IEEE Signal Processing Magazine 7, 16–35 (1992)

    Article  Google Scholar 

  21. Shankar, R.V., Asokan, N.: A parallel implementation of the HT method to detect lines and curves in pictures. In: Proc. MWSCAS’32, pp. 321–324 (1990)

    Google Scholar 

  22. Chuang, H.Y.H., Li, C.C.: A systolic processor for straight line detection by modified HT. In: IEEE Conf. on Computer Architecture for Pattern Analysis and Image Database Management, pp. 300–304. IEEE Computer Society Press, Los Alamitos (1995)

    Google Scholar 

  23. Ercegovac, M., Lang, T.: Division and Square root: Digit-Recurrence. In: Algorithms and Implementations, Kluwer Academic Publishers, Dordrecht (1994)

    Google Scholar 

  24. Piñeiro, J-A., Bruguera, J.D, Muller, J.M.: Faithful powering computation using table look-up and a fused accumulation tree. In: Proc. ARITH’01, pp. 40–47 (2001)

    Google Scholar 

  25. Piñeiro, J-A., Ercegovac, M., Bruguera, J.D.: High-Radix Logarithm with selection Rounding. In: Proc. ASAP’02, pp. 101–110 (2002)

    Google Scholar 

  26. Deng Dixon, D.S., El Gindy, H.: High speed Parametrizable HT using reconfigurable hardware. In: Proc. ACM VIP, pp. 51–57. ACM Press, New York (2001)

    Google Scholar 

  27. Bruguera, J.D., Guil, N.: CORDIC-based parallel/pipelined architecture for the HT. J. of VLSI Signal Processing 12(3), 207–221 (1996)

    Article  Google Scholar 

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Paul Lukowicz Lothar Thiele Gerhard Tröster

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© 2007 Springer Berlin Heidelberg

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Signes Pont, M.T., García Chamizo, J.M., Mora Mora, H., de Miguel Casado, G. (2007). Parametric Architecture for Function Calculation Improvement. In: Lukowicz, P., Thiele, L., Tröster, G. (eds) Architecture of Computing Systems - ARCS 2007. ARCS 2007. Lecture Notes in Computer Science, vol 4415. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-71270-1_18

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  • DOI: https://doi.org/10.1007/978-3-540-71270-1_18

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-71267-1

  • Online ISBN: 978-3-540-71270-1

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