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Tool Integration and Interoperability Challenges of a System-Level Design Flow: A Case Study

  • Andy D. Pimentel
  • Todor Stefanov
  • Hristo Nikolov
  • Mark Thompson
  • Simon Polstra
  • Ed F. Deprettere
Part of the Lecture Notes in Computer Science book series (LNCS, volume 5114)

Abstract

Daedalus is a system-level design flow for the design of multiprocessor system-on-chip (MP-SoC) based embedded multimedia systems. It offers a fully integrated tool-flow in which design exploration, system-level synthesis, application mapping, and system prototyping of MP-SoC architectures are highly automated. In this paper, we describe Daedalus from a software perspective, explaining its supporting software infrastructure and the way the various tools interoperate. Moreover, we discuss the lack of support for achieving tool interoperability that we have encountered during the development of Daedalus, and present several ideas of future research directions to address this issue. More specifically, we argue that a so-called Common Design Flow Infrastructure (CDFI) for system-level design flows is needed to improve and stimulate research and development in the area of system-level design methodology.

Keywords

Design Space Exploration Register Transfer Level Kahn Process Network Tool Interoperability Tool Infrastructure 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

  1. 1.
    Martin, G.: Overview of the MPSoC Design Challenge. In: Proc. Design Automation Conference (DAC 2006), San Francisco, USA (2006)Google Scholar
  2. 2.
    Mihal, A., Keutzer, K.: Mapping concurrent applications onto architectural platforms. In: Networks on Chips, pp. 39–59. Kluwer Academic Publishers, Dordrecht (2003)Google Scholar
  3. 3.
    Thompson, M., Stefanov, T., Nikolov, H., Pimentel, A.D., Erbas, C., Polstra, S., Deprettere, E.F.: A framework for rapid system-level exploration, synthesis, and programming of multimedia MP-SoCs. In: Proc. of the Int. Conference on Hardware-Software Codesign and System Synthesis (CODES+ISSS 2007), pp. 9–14 (2007)Google Scholar
  4. 4.
    Nikolov, H., Thompson, M., Stefanov, T., Pimentel, A.D., Polstra, S., Bose, R., Zissulescu, C., Deprettere, E.F.: Daedalus: Toward composable multimedia MP-SoC design. In: Proc. of the Design Automation Conference (DAC 2008) (2008)Google Scholar
  5. 5.
    Daedalus system-level design, http://daedalus.liacs.nl/
  6. 6.
    Verdoolaege, S., Nikolov, H., Stefanov, T.: PN: a tool for improved derivation of process networks. EURASIP Journal on Embedded Systems (2007) doi:10.1155/2007/75947Google Scholar
  7. 7.
    Kahn, G.: The semantics of a simple language for parallel programming. In: Proc. of the IFIP Congress, vol. 74 (1974)Google Scholar
  8. 8.
    Stefanov, T., Kienhuis, B., Deprettere, E.F.: Algorithmic transformation techniques for efficient exploration of alternative application instances. In: Proc. of the Int. Symposium on Hardware/Software Codesign (CODES), pp. 7–12 (2002)Google Scholar
  9. 9.
    Pimentel, A.D., Erbas, C., Polstra, S.: A systematic approach to exploring embedded system architectures at multiple abstraction levels. IEEE Trans. on Computers 55, 99–112 (2006)CrossRefGoogle Scholar
  10. 10.
    Erbas, C., Pimentel, A.D., Thompson, M., Polstra, S.: A framework for system-level modeling and simulation of embedded systems architectures. EURASIP Journal on Embedded Systems (2007) doi:10.1155/2007/82123Google Scholar
  11. 11.
    Nikolov, H., Stefanov, T., Deprettere, E.F.: Multi-processor system design with ESPAM. In: Proc. of the Int. Conf. on HW/SW Codesign and System Synthesis (CODES+ISSS 2006), pp. 211–216 (2006)Google Scholar
  12. 12.
    Nikolov, H., Stefanov, T., Deprettere, E.F.: Systematic and automated multi-processor system design, programming, and implementation. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) 27, 542–555 (2008)CrossRefGoogle Scholar
  13. 13.
    Pimentel, A.D., Thompson, M., Polstra, S., Erbas, C.: Calibration of abstract performance models for system-level design space exploration. Journal of Signal Processing Systems for Signal, Image, and Video Technology 50 (2008)Google Scholar
  14. 14.
  15. 15.
  16. 16.
    Ludäscher, B., et al.: Scientific workflow management and the kepler system. Concurrency and Computation: Practice & Experience 18 (2006)Google Scholar
  17. 17.
    Kangas, T., et al.: UML-based multi-processor SoC design framework. ACM Trans. on Embedded Computing Systems 5, 281–320 (2006)CrossRefGoogle Scholar
  18. 18.
    McAllister, J., Woods, R., Fischaber, S., Malins, E.: Rapid implementation and optimisation of DSP systems on FPGA-centric heterogeneous platforms. Journal of Systems Architecture 53, 511–523 (2007)CrossRefGoogle Scholar
  19. 19.
    Stefanov, T., et al.: System design using Kahn process networks: The Compaan/Laura approach. In: Proc. of the Int. Conference on Design, Automation and Test in Europe (DATE), pp. 340–345 (2004)Google Scholar
  20. 20.
    Rutten, M.J., et al.: A Heterogeneous Multiprocessor Architecture for Flexible Media Processing. IEEE Design & Test of Computers 19 (2002)Google Scholar
  21. 21.
    Lyonnard, D., et al.: Automatic Generation of Application-Specific Architectures for Heterogeneous Multiprocessor System-on-Chip. In: Proc. of the Design Automation Conference (DAC 2001) (2001)Google Scholar
  22. 22.
    Gerstlauer, A., Gajski, D.: System-level abstraction semantics. In: Proc. 15th Int. Symposium on System Synthesis (ISSS 2002), pp. 231–236 (2002)Google Scholar
  23. 23.

Copyright information

© Springer-Verlag Berlin Heidelberg 2008

Authors and Affiliations

  • Andy D. Pimentel
    • 1
  • Todor Stefanov
    • 2
  • Hristo Nikolov
    • 2
  • Mark Thompson
    • 1
  • Simon Polstra
    • 1
  • Ed F. Deprettere
    • 2
  1. 1.Computer Systems Architecture group Informatics InstituteUniversity of AmsterdamThe Netherlands
  2. 2.Leiden Embedded Research CenterLeiden UniversityThe Netherlands

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